High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator

Continuous MOSFET performance increase with device scaling: The role of strain and channel material innovations

“…This is evident in the higher mobility at high inversion charge densities for the devices with thin strained Si caps shown in (b), where enhancement factors are taken relative to the universal curve derived from Takagi [26]. From [41], reproduced with permission; ©2004 IEEE. …”

“…For the 2.1-nm-thick cap device, the Si cap is too thin to accommodate the holes, and inversion occurs primarily in the SiGe layer, resulting in a slight decrease in the maximum capacitance or an increase in the effective insulator thickness. From [41], reproduced with permission; ©2004 IEEE.…”

Performance and new effects in advanced SOI devices and materials

“…The HOI structure (strained Si/strained SiGe/ strained Si heterostructure on insulator) presents also substantial electron and hole mobility enhancements [15]. In particular, hole mobilities are very high for thin Si cap layer (enhancement of about 100%) compared with the universal SOI mobility and are also significantly larger that the best SSDOI mobility (Strained Si Directly On Insulator) due to the compressively strained buried SiGe channel (Fig.…”

Interdiffusion in SiGe/Si Epitaxial Heterostructures

“…This assumption was tested by experimental results from "peak and step" structures with differenty values with the same substrate Ge fraction x. Compressive strain was found to increase the interdiffusivity by 4.4X for every 0.042 increase in compressive strain, which is equivalent to 10% decrease in x (Fig. 3), which can be summarized as: D,(x,) D%(0*exp(14.9* l J) (2) where Dc and DR are the interdiffusivity values under compressive strain and relaxed strain respectively, and …”

“…Carrier transport is enhanced by applying strain in Si channels or by the use of strained SiGe as p -MOSFET channels, as in dual-channel [1] and heterostructure -on-insulator (HOI) MOSFETs [2]. One issue for these structures is interdiffusion at the strained Si/strained SiGe interface during processing, which degrades device performance by reducing strain and carrier confinement and increasing alloy scattering.…”