High-Efficiency LDMOS Power-Amplifier Design at 1 GHz Using an Optimized Transistor Model

Nemati, Hossein Mashad; Fager, Christian; Thorsell, Mattias; Zirath, Herbert

doi:10.1109/tmtt.2009.2022590

Cited by 39 publications

(26 citation statements)

References 14 publications

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“…Although good agreement between simulation and measurement results are obtained, the discrepancy at high power may be related to the self-heating in the device. At low output power, the differences between simulated and measured performance may be related to the switch mode operation of the model [26][27][28].…”

Section: Cw Performancementioning

confidence: 99%

Effect of Second and Third Harmonic Input Impedances in a Class-F Amplifier

Abbasian¹,

Johnson²

2015

PIER C

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Abstract-In this paper, the design of a class-F radio frequency power amplifier with a multiharmonic input transmission line network is presented. Harmonic signal components at the gate come from several sources including nonlinear device capacitances and imperfect output harmonic terminations that create harmonic components that are fed back to the gate through the gate-drain capacitance. The effect of these harmonic generation mechanisms and the potential to shape the gate waveform to improve power efficiency are investigated. The study shows that a second harmonic short is most beneficial and the effect of a third harmonic termination is less significant. The concepts are applied to the design of a 10 W GaN class-F amplifier and the design is supported by theoretical, simulation and experimental results. The fabricated design has a measured drain efficiency of 78.8% at an output power of 40.5 dBm for a frequency of 990 MHz. The amplifier was also tested with a 8.8 dB peak-to-average power ratio 5 MHz WCDMA signal. With the modulated signal, the adjacent channel power ratio was −33.1 dBc at a drain efficiency of 46.1% without predistortion correction.

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Section: Cw Performancementioning

confidence: 99%

Effect of Second and Third Harmonic Input Impedances in a Class-F Amplifier

Abbasian¹,

Johnson²

2015

PIER C

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“…Tuned or optimized matching networks [3], [This Work]. C. Hybrid classes like AB or Doherty [4,5]. D. Switch-mode amplification (envelope tracking) [6].…”

Section: B Multi Bias Points Of the Circuit C Nonlinear Rf Performmentioning

confidence: 99%

Ldmos Modeling and High Efficiency Power Amplifier Design Using Pso Algorithm

Jahanbakht¹,

Tondro.Aghmyoni²

2012

PIER M

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Abstract-A simple and nonlinear LDMOS transistor model with multi-bias consideration has been proposed. Elements of the model are optimizes using particle swarm optimization (PSO) algorithm to fit the measured RF specifications of a typical transistor. The developed model is used then to design a high efficiency power amplifier with 55% power added efficiency (PAE) at 33 dBm output power with 12 dB power gain. This amplifier has a novel topology with optimized BALUN and microstrip matching network which makes it unconditionally stable and extensively linear over UHF frequency range of 100 MHz to 1 GHz with 163% fractional bandwidth. This power amplifier is fabricated and realized with 12-V supply voltage. A good agreement between simulated and measured values observed, indicating high accuracy of either the model and the amplifier design approach.

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“…One of the reasons is that modern HV-MOS devices, like Lateral doubleDiffusion MOS (LDMOS), may be integrated together with low-voltage modules in CMOS processes [3,5]. The systems, where such devices are used, range from power components for automotive and consumer products [2] up to radio frequency applications [6][7][8]. Therefore, compact modeling of HV-MOS is an enabling factor that will help in predicting how these devices can be optimally integrated in complex architectures [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26].…”

Section: Introductionmentioning

confidence: 99%

RF Compact Modeling of High-voltage MOSFETs

et al. 2012

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The High-Voltage MOSFET is used in a wide variety of applications covering from power systems up to RF-IC. Compact models that describe the high-frequency behavior of the device are required to predict high-frequency operation and switching capabilities of these elements in HV state-of-the-art systems. In this paper, an RF model is presented and verified against extensive Y-parameter measurements, which were carried out on a long channel Lateral doubleDiffusion MOS device. Assessment of the model with measurements confirms the validity of this approach.

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High-Efficiency LDMOS Power-Amplifier Design at 1 GHz Using an Optimized Transistor Model

Cited by 39 publications

References 14 publications

Effect of Second and Third Harmonic Input Impedances in a Class-F Amplifier

Effect of Second and Third Harmonic Input Impedances in a Class-F Amplifier

Ldmos Modeling and High Efficiency Power Amplifier Design Using Pso Algorithm

RF Compact Modeling of High-voltage MOSFETs

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