Effect of Second and Third Harmonic Input Impedances in a Class-F Amplifier

Abstract

Abstract-In this paper, the design of a class-F radio frequency power amplifier with a multiharmonic input transmission line network is presented. Harmonic signal components at the gate come from several sources including nonlinear device capacitances and imperfect output harmonic terminations that create harmonic components that are fed back to the gate through the gate-drain capacitance. The effect of these harmonic generation mechanisms and the potential to shape the gate waveform to improve power efficiency are investigated. The study shows that a second harmonic short is most beneficial and the effect of a third harmonic termination is less significant. The concepts are applied to the design of a 10 W GaN class-F amplifier and the design is supported by theoretical, simulation and experimental results. The fabricated design has a measured drain efficiency of 78.8% at an output power of 40.5 dBm for a frequency of 990 MHz. The amplifier was also tested with a 8.8 dB peak-to-average power ratio 5 MHz WCDMA signal. With the modulated signal, the adjacent channel power ratio was −33.1 dBc at a drain efficiency of 46.1% without predistortion correction.

S Band Hybrid Power Amplifier in GaN Technology with Input/Output Multi Harmonic Tuned Terminations

“…If we assume the active device (in the following considered as FET type) acting as a voltage controlled current source, a general scheme of the harmonic control technique is represented in Figure 1. In the reported scheme, the input matching network (ZS1 and filter @ f 0 ) has to assure, at the fundamental frequency, the conjugate matching criterion over the operating bandwidth, whereas the input harmonic terminations (ZL2, @2 f 0 ; ZL3, @3 f 0 ) shape the v GS voltage waveform (i.e., the FET input controlling signal), which ultimately controls the generation of the output drain current harmonic components [14][15][16]. The role of the output matching network (ZL1, @ f 0 ) is to achieve a purely resistive loading at the intrinsic terminal of the active device nonlinear current source, whereas the other output matching networks (ZL2, @2 f 0 ; ZL3, @3 f 0 ) are used to properly shape the device output voltage waveforms v DS .…”