Hierarchical interface-based supervisory control-part II: parallel case

Leduc, Ryan J.; Lawford, Mark; Wonham, W. M.

doi:10.1109/tac.2005.854612

Cited by 82 publications

(75 citation statements)

References 5 publications

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“…The reachable statespace for the high-level was 1.14 × 10 15 , and the total estimated, worst case, reachable statespace was 1.51 × 10 30 , although the actual size is likely a lot smaller. This is a clear improvement over previous HISC algorithms from [4]- [6], [19].…”

Section: Aip Examplementioning

confidence: 79%

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Synthesis Method for Hierarchical Interface-based Supervisory Control

Leduc

Dai

2007

2007 American Control Conference

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Hierarchical Interface-Based Supervisory Control (HISC) decomposes a discrete-event system (DES) into a high-level subsystem which communicates with n ≥ 1 low-level subsystems, through separate interfaces. It provides a set of local conditions that can be used to verify global conditions such as nonblocking and controllability such that the complete system model never needs to be constructed.Currently, a designer must create the supervisors himself and then verify that they satisfy the HISC conditions. In this paper, we develop a synthesis method that can take advantage of the HISC structure.We replace the supervisor for each level by a corresponding specification DES. We then construct for each level a maximally permissive supervisor that satisfies the corresponding HISC conditions.We define a set of language based fixpoint operators and show that they compute the required level-wise supremal languages. We then discuss the complexity of our algorithms and show that they potentially offer significant savings over the monolithic approach. We also briefly discuss a symbolic HISC verification and synthesis method using Binary Decision Diagrams, that we have also developed.A large manufacturing system example (worst case state space on the order of 10 30 ) extended from the AIP example is briefly discussed. The example showed that we can now handle a given level with a statespace as large as 10 15 states, using less than 160MB of memory. This represents a significant improvement in the size of systems that can be handled by the HISC approach. A software tool for synthesis and verification of HISC systems using our approach was also developed.

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Section: Aip Examplementioning

confidence: 79%

“…Both the HISC verification algorithms from [4]- [6], [19] and the HISC synthesis algorithms we just discussed, are currently based upon explicit state and transition listings which limit the size of a given level (i.e. high-level, or a given low-level) to about 10 7 states when 1GB of memory is used.…”

Section: B Symbolic Algorithmsmentioning

confidence: 99%

Synthesis Method for Hierarchical Interface-based Supervisory Control

Leduc

Dai

2007

2007 American Control Conference

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“…Different methods have been developed that allow for an automatic synthesis of a supervisor. As computational complexity is high for systems of industrial size, several advanced techniques have been introduced to reduce synthesis complexity, such as modular [25], hierarchical [35], interface-based hierarchical [14], aggregative [11,17], distributed [9,13,32], coordinated distributed [29], and aggregated distributed [30]. They allow for splitting a system in a number of modules for which local supervisors can be synthesized.…”

Section: Synthesis-based Supervisory Control Engineeringmentioning

confidence: 99%

Integration of Supervisory Control Synthesis in Model-Based Systems Engineering

2016

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Increasing system complexity, time to market and development costs reduction place higher demands on engineering processes. Formal models play an important role here because they enable the use of various model-based analyses and early integration techniques and tools. Engineering processes based on formal models are able to cope with complexity. They also support time to market and development costs reduction. Moreover, application of supervisory control synthesis in the development of control systems can speed up the process considerably. This paper discusses the integration of recently developed supervisor synthesis techniques and tools in engineering processes. To illustrate this approach, examples of industrial cases are presented, where supervisors synthesized have successfully been implemented and integrated in existing resource control platforms. IntroductionIn current industrial practice, it is very difficult to deal with high-tech multidisciplinary system development due to system complexity, market pressure, and resource limitations. To overcome the difficulties, various kinds of models are used increasingly often in the development process. Specifically, formal and executable models built and employed in the design phase can be used to assess functional correctness and performance of component designs and overall system design. Formal verification, in particular model checking [3], is employed when a high degree of confidence in functional correctness of a design is required. To assess design performance, one

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“…The approach can handle fairly large systems even though it is centralized. In Leduc et al (2005) an interface-based hierarchical synthesis approach is presented, which fully exploits the benefit of interface invariance in system decoupling so that synthesis is carried out only in local components. One potential drawback of this approach is that the conditions for interface invariance may be too strong for many practical applications.…”

Section: Supervisory Control Theorymentioning

confidence: 99%

Application of supervisory control theory to theme park vehicles

Forschelen

Mortel-Fronczak

et al. 2012

Discrete Event Dyn Syst

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Due to increasing system complexity, time-to-market and development costs reduction, new engineering processes are required. Model-based engineering processes are suitable candidates because they support system development by enabling the use of various model-based analysis techniques and tools. As a result, they are able to cope with complexity and have the potential to reduce time-tomarket and development costs. Moreover, supervisory control synthesis can be integrated in this setting, which can further contribute to the development of control systems. To evaluate the applicability of recently developed supervisor synthesis techniques and to show how they can be integrated in an engineering process, a theme park vehicle is chosen as a case study. The supervisor synthesized for the theme park vehicle has successfully been implemented and integrated in the existing resource-control platform.

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Hierarchical interface-based supervisory control-part II: parallel case

Cited by 82 publications

References 5 publications

Synthesis Method for Hierarchical Interface-based Supervisory Control

Synthesis Method for Hierarchical Interface-based Supervisory Control

Integration of Supervisory Control Synthesis in Model-Based Systems Engineering

Application of supervisory control theory to theme park vehicles

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