IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) 2007
DOI: 10.1109/isvlsi.2007.48
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Hierarchical Concurrent Congestion and Wirelength Estimation in the Presence of IP Blocks

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Cited by 4 publications
(1 citation statement)
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“…Their work, however, lacks from considering the complexity of the circuits into account and hence the average wirelength obtained form these techniques overestimate the actual wirelength for circuits with large chip area. We have proposed a methodology to estimate the average wirelength in [1,2,4,6], which is based on a hierarchical placement of the circuit into a square Manhattan grid in the presence of blockages. This methodology is very similar to Donath's method for estimating total wirelength.…”
Section: Wirelength Estimation In Presence Of Ip Blocksmentioning
confidence: 99%
“…Their work, however, lacks from considering the complexity of the circuits into account and hence the average wirelength obtained form these techniques overestimate the actual wirelength for circuits with large chip area. We have proposed a methodology to estimate the average wirelength in [1,2,4,6], which is based on a hierarchical placement of the circuit into a square Manhattan grid in the presence of blockages. This methodology is very similar to Donath's method for estimating total wirelength.…”
Section: Wirelength Estimation In Presence Of Ip Blocksmentioning
confidence: 99%