Hierarchical approach to exact symbolic analysis of large analog circuits

Abstract

This paper provides a novel approach to exact symbolic analysis of very large analog circuits. The new method is based on determinant decision diagrams (DDDs) to represent symbolic product terms. But instead of constructing DDD graphs directly from a flat circuit matrix, the new method constructs DDD graphs in a hierarchical way based on hierarchically defined circuit structures. The resulting algorithm can analyze much larger analog circuits exactly than before. Theoretically, we show that exact symbolic expressions of a circuit are cancellation-free expressions when the circuit is analyzed hierarchically. Practically we propose a novel hierarchical DDD graph construction algorithm. Our experimental results show that very large analog circuits, which can't be analyzed exactly before like µA725 and other unstructured circuits up to 100 nodes, can be analyzed by the new approach for the first time. The new approach significantly improves the exact symbolic capacity and promises huge potentials for the new applications of symbolic analysis in analog circuit design automation.

Efficient Analog Circuit Modeling By Boolean Logic Operations

“…Next, we test the new program on a number of analog circuits and structured RC filter circuits. The selected circuits are three Opamp circuits, CMOS Opamp, µA741, µA725 [11], one active band-pass filter [10], and a number of mesh-structured RC circuits. For instance, circuit p5x20x2 has 5 rows and each row is an RC ladder circuit with 20 RC segments.…”

“…First we compared our new determinant construction algorithm with the Laplace expansion algorithm and the exact hierarchical DDD algorithm [11], which is the most efficient exact symbolic analysis algorithm reported so far. We compared the resulting sizes of DDD graphs for the denominator of a transfer function for each circuit and CPU time of the DDD construction for the whole transfer functions.…”

“…The failure typically comes from excessive memory use as approximately only 1GB is available for user programs in our Linux computer. For the hierarchical method, we typically use 5 or 10 as the limit for the number of internal nodes for each subcircuit as they are the best subcircuit sizes for exact hierarchical analysis as shown in [11]. For Laplace expansion based method, only very small circuits can be analyzed and the new method has much greater capacity.…”

“…generated sequence of expressions is difficult to interpret and manipulate. Recently a hierarchical DDD construction algorithm was proposed in [11] that overcomes the previous hierarchical analysis problems and extends the exact symbolic analysis capacities.…”

A new original method for symbolic analysis of electronic circuits

“…Tabela 7.2 prikazuje uporedo rezultate hijerarhijske simboličke analize DDD i TDD zasnovanog simboličkog simulatora. Podaci za DDD simulaciju dva aktivna filtra preuzeti su iz [Tan_000], dok su rezultati sa filter sa promenjivom stanja preuzeti iz [Tan_005].…”