Hafnium oxide/germanium oxynitride gate stacks on germanium: Capacitance scaling and interface state density

Oshima, Yasuhiro; Shandalov, Michael; Sun, Yun; Pianetta, P.; McIntyre, Paul C.

doi:10.1063/1.3116624

Cited by 56 publications

(31 citation statements)

References 19 publications

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“…Some literature reported that in situ Ge plasma nitridation for ALD high-k thin film deposition can improve the interface quality [9,18,33]. However, there is rare work on fabrication of the Gebased MOS device with sub-nanometer CET by in situ Ge plasma nitridation.…”

Section: Resultsmentioning

confidence: 97%

HfO2/GeO N /Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment

Cao

Liu

et al. 2015

Applied Surface Science

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Section: Resultsmentioning

confidence: 97%

HfO2/GeO N /Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment

Cao

Liu

et al. 2015

Applied Surface Science

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“…The previously published data use a variety of gate oxides and substrates, which could affect both the reported D it and TDD values. 7,8,10,16,[43][44][45][46][47] Hence, the device structure is indicated alongside each data point. An interesting pattern emerges for Ge devices on Si using different epitaxial integration schemes and an Al 2 O 3 /GeO x gate stack: an almost linear increase in D it with increasing TDD.…”

Section: Benchmarking D It As a Function Of Dislocation Densitymentioning

confidence: 99%

Growth, structural, and electrical properties of germanium-on-silicon heterostructure by molecular beam epitaxy

et al. 2017

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The growth, morphological, and electrical properties of thin-film Ge grown by molecular beam epitaxy on Si using a two-step growth process were investigated. High-resolution x-ray diffraction analysis demonstrated ∼0.10% tensile-strained Ge epilayer, owing to the thermal expansion coefficient mismatch between Ge and Si, and negligible epilayer lattice tilt. Micro-Raman spectroscopic analysis corroborated the strain-state of the Ge thin-film. Cross-sectional transmission electron microscopy revealed the formation of 90 ° Lomer dislocation network at Ge/Si heterointerface, suggesting the rapid and complete relaxation of Ge epilayer during growth. Atomic force micrographs exhibited smooth surface morphology with surface roughness < 2 nm. Temperature dependent Hall mobility measurements and the modelling thereof indicated that ionized impurity scattering limited carrier mobility in Ge layer. Capacitance- and conductance-voltage measurements were performed to determine the effect of epilayer dislocation density on interfacial defect states (Dit) and their energy distribution. Finally, extracted Dit values were benchmarked against published Dit data for Ge MOS devices, as a function of threading dislocation density within the Ge layer. The results obtained were comparable with Ge MOS devices integrated on Si via alternative buffer schemes. This comprehensive study of directly-grown epitaxial Ge-on-Si provides a pathway for the development of Ge-based electronic devices on Si.

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“…1 The main problem for the application of Ge is the effective surface passivation before the deposition of the gate dielectric. 2 Many attempts have been proposed to solve this problem such as introducing sulfurization, 3 NH 3 plasma, 4 thermal oxidation, 5-7 H 2 /N 2 / Ar plasma, 8 atomic O, 9 ozone, 10 and so on for the Ge surface passivation. Among all these techniques, the introduction of an interlayer (IL) formed by GeO 2 gave the lowest density of interface states (D it ) and highest comprehensive performance.…”

Section: CMmentioning

confidence: 99%

Effective reduction of fixed charge densities in germanium based metal-oxide-semiconductor devices

Deng¹,

Xie²,

Deduytsche³

et al. 2011

Applied Physics Letters

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Side-gate effects on the direct current and radio frequency characteristics of AlGaN/GaN high-electron-mobility transistor on Si Appl. Phys. Lett. 99, 163505 (2011) Temperature dependence of current density and admittance in metal-insulator-semiconductor junctions with molecular insulator J. Appl. Phys. 110, 083708 (2011) Synthesis and electrical and magnetic properties of Mn-doped SnO2 nanowires J. Appl. Phys. 110, 083907 (2011) Effect of the Ti molar ratio on the electrical characteristics of titanium-indium-zinc-oxide thin-film transistors fabricated by using a solution process Appl. Phys. Lett. 99, 161908 (2011) Accurate characterization of organic thin film transistors in the presence of gate leakage current AIP Advances 1, 042123 (2011) Additional information on Appl. Phys. Lett.

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Hafnium oxide/germanium oxynitride gate stacks on germanium: Capacitance scaling and interface state density

Abstract: Articles you may be interested inComprehensive study and design of scaled metal/high-k/Ge gate stacks with ultrathin aluminum oxide interlayers Appl.

Cited by 56 publications

References 19 publications

HfO2/GeO N /Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment

HfO2/GeO N /Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment

Growth, structural, and electrical properties of germanium-on-silicon heterostructure by molecular beam epitaxy

Effective reduction of fixed charge densities in germanium based metal-oxide-semiconductor devices

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