Growth of high quality Ge epitaxial layer on Si(100) substrate using ultra thin Si_0.5Ge_0.5 buffer

Abstract

As conventional Si based device structures are approaching their physical limits, Ge epitaxial film on Si (100) substrate becomes more attractive for virtual substrates, on which advanced channel engineering techniques to be applied, or integrated Ge photonic devices to be formed. Low threading dislocation density and smooth surface are key features to realize such applications of the Ge/Si virtual substrate. To date, growth methods for Ge epitaxial film on Si (100) substrate involve at least one of thick (micrometer order) Si x Ge 1-x buffer growth process, high temperature annealing steps or Chemical mechanical polishing (CMP) process, any of which could compromise reliability and suitability for production.In this study, feasibility of ultra thin (in the order of 10 nm) Si x Ge 1-x buffer layer for pure Ge epitaxial growth was investigated with regard to Ge layer's crystallinity, threading dislocation density, and surface roughness, as well as suitability for production.As a result, Ge epitaxial film that has low threading dislocation density with very smooth surface (root mean square (RMS) = 0.44 nm) was successfully grown in shorter process time by using SiGe buffer layer 1/1000 thinner than that of previously known methods without using CMP or high temperature annealing.

The influence of low-temperature Ge seed layer on growth of high-quality Ge epilayer on Si(100) by ultrahigh vacuum chemical vapor deposition

“…[10,13,14,18]). It is suggested that it is very difficult to fully relieve the strain in the Ge seed layer when growing at LT (300-400 1C).…”

“…To decrease TDD from 9 Â 10 8 to 2 Â 10 7 cm À2 , 10 cycles of thermal annealing was ex situ performed [9]. Recently, Nakatsuru et al [13] and Loh et al [14] reported a modified two-step growth approach, i.e., growing an ultra thin (2-30 nm) LT SiGe buffer layer prior to the deposition of LT Ge seed layer and HT Ge layer. With the help of LT SiGe layer to absorb partially misfit strain, provide Ge nucleation sites, and coalesce dislocations, the TDD can be reduced to 6 Â 10 6 cm À2 , without any thermal annealing.…”

“…[13,14], the influence of Ge content, thickness, and growth temperature of SiGe buffer layer on the quality of epitaxial Ge films were investigated. In this work, high-quality Ge epilayer on Si utilizing modified two-step approach by ultrahigh vacuum chemical vapor deposition (UHVCVD) was achieved with a surface RMS roughness of less than 1 nm and a TDD of 5 Â 10 5 cm À2 .…”

Selective-Area High-Quality Germanium Growth for Monolithic Integrated Optoelectronics

“…After each deposition and annealing, the surface becomes smoother. After the fourth cycle, surface roughness reaches 0.61 nm, which is one of the lowest values without chemical mechanical planarization process for selective heteroepitaxial growth of Ge on Si [16], [17]. Cross-sectional TEM images were obtained to better understand Ge crystal defects originating from 4.2% lattice mismatch.…”

Ge-on-Si: Single-Crystal Selective Epitaxial Growth in a CVD Reactor

“…However, the desire to merge Ge with Si to lower the price and for better compatibility with Si CMOS technology has led to development of a variety of techniques to grow crystalline Ge epitaxially on Si substrates [2,3,4]. For this purpose many studies have aimed at overcoming the lattice-mismatch of 4.2% between Ge and Si and some reports of good quality Ge-on-Si have appeared for approaches such as those using SiGe buffer layers [5] and [6], lateral overgrowth [7] and aspect ratio trapping (ART) by growth in high aspect ratio trenches [8] [9]. However, Ge epitaxial growth on SiGe buffer layers that can be as thick as a micron or so, still results in some degree of dislocations degrading the quality of the Ge [10], and the lateral overgrowth and ART techniques developed up until now are dependent on critical nano-scale patterning and selective growth over window sizes in the 100 nm range.…”