Growth and structural properties of SiGe virtual substrates on Si(100), (110) and (111)

Destefanis, V.; Hartmann, Jean‐Michel; Abbadie, A.; Papon, Anne‐Marie; Billon, T.

doi:10.1016/j.jcrysgro.2008.12.034

Cited by 47 publications

(23 citation statements)

References 26 publications

(34 reference statements)

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“…The thicker HT layer then provides a region in which any threading dislocation (TD) arms can glide and eliminate, thereby reducing their number reaching the surface of the buffer. The results of our work and of others [8][9][10][11] show that it is very challenging to grow smooth, high quality epitaxial layers compared to the (100) orientation. The main obstacle is the 4.2% lattice mismatch between Ge and Si.…”

Section: Introductionmentioning

confidence: 69%

“…The high density of SFs observable under cross-sectional TEM is better illustrated under plan-view TEM, which also shows the typical arrangement of the {111} glide planes for (111) growth ( Figure 2). The SF features were seen lying along three particular directions, which we interpret as being the [1][2][3][4][5][6][7][8][9][10], [À101], and [01-1] directions indicating the intersections of the {111} glide planes with the (111) growth plane. Threading dislocations can also be observed, but they appear to be pinned by the network of SFs and become undistinguishable, where the faults overlap.…”

Section: Lt Ge Seed Layermentioning

confidence: 99%

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High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation

Dobbie¹,

Myronov²,

Leadley³

2013

Journal of Applied Physics

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Epitaxial growth of Ge on Si has been investigated in order to produce high quality Ge layers on (110)- and (111)-orientated Si substrates, which are of considerable interest for their predicted superior electronic properties compared to (100) orientation. Using the low temperature/high temperature growth technique in reduced pressure chemical vapour deposition, high quality (111) Ge layers have been demonstrated almost entirely suppressing the formation of stacking faults (< 107 cm−2) with a very low rms roughness of less than 2 nm and a reduction in threading dislocation density (TDD) (∼ 3 × 108 cm−2). The leading factor in improving the buffer quality was use of a thin, partially relaxed Ge seed layer, where the residual compressive strain promotes an intermediate islanding step between the low temperature and high temperature growth phases. (110)-oriented layers were also examined and found to have similar low rms roughness (1.6 nm) and TDD below 108 cm−2, although use of a thin seed layer did not offer the same relative improvement seen for (111).

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Section: Introductionmentioning

confidence: 69%

Section: Lt Ge Seed Layermentioning

confidence: 99%

High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation

Dobbie¹,

Myronov²,

Leadley³

2013

Journal of Applied Physics

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“…14 Assuming tetragonal distortion, a Ge:B can be obtained from the in-plane a Ge:B ʈ and perpendicular a Ge:B Ќ lattice constants of the Ge:B layer. 15 We obtain a Ge:B in Ge:B on Si͑110͒ is calculated to be 7.8ϫ 10 20 cm −3 . This is significantly higher than the total B concentration in Ge:B grown Si͑100͒ under the same growth conditions.…”

mentioning

confidence: 73%

Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate

Han

Guo

Yang

et al. 2011

Applied Physics Letters

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Physical-gap-channel graphene field effect transistor with high on/off current ratio for digital logic applications Appl. Phys. Lett. 101, 143102 (2012) Short channel mobility analysis of SiGe nanowire p-type field effect transistors: Origins of the strain induced performance improvement Appl. Phys. Lett. 101, 143502 (2012) Terahetz detection by heterostructed InAs/InSb nanowire based field effect transistors Development of high-performance fully depleted silicon-on-insulator based extended-gate field-effect transistor using the parasitic bipolar junction transistor effect Appl. Phys. Lett. 101, 133703 (2012) Abnormal interface state generation under positive bias stress in TiN/HfO2 p-channel metal-oxide-semiconductor field effect transistors

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“…Therefore, in addition to surface energies and structures, the processing conditions resulted in a strong orientation dependence compared with previously reported results. 23,24 The SEG process of Si 1-x Ge x was applied to a Si recessed pattern with silicon oxide and silicon nitride dummy gates. The Si 0.8 Ge 0.2 growth rate on the (001) Si surface of a patterned wafer is shown in Fig.…”

Section: Resultsmentioning

confidence: 99%

Selective epitaxial growth of stepwise SiGe:B at the recessed sources and drains: A growth kinetics and strain distribution study

et al. 2016

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The selective epitaxial growth of Si1-xGex and the related strain properties were studied. Epitaxial Si1-xGex films were deposited on (100) and (110) orientation wafers and on patterned Si wafers with recessed source and drain structures via ultrahigh vacuum chemical vapor deposition using different growing steps and Ge concentrations. The stepwise process was split into more than 6 growing steps that ranged in thicknesses from a few to 120 nm in order to cover the wide stages of epitaxial growth. The growth rates of SiGe on the plane and patterned wafers were examined and a dependence on the surface orientation was identified. As the germanium concentration increased, defects were generated with thinner Si1-xGex growth. The defect generation was the result of the strain evolution which was examined for channel regions with a Si1-xGex source/drain (S/D) structure.

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Growth and structural properties of SiGe virtual substrates on Si(100), (110) and (111)

Cited by 47 publications

References 26 publications

High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation

High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation

Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate

Selective epitaxial growth of stepwise SiGe:B at the recessed sources and drains: A growth kinetics and strain distribution study

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