Growth and characterization of Ge nanocrystals in ultrathin SiO2 films

The formation of Ge nanocrystals in a metal–insulator–semiconductor structure and its memory effect

“…It can be argued that much of the intensity variation with annealing time seen in Fig. 2 by the redistribution of Ge, but that can also be influenced by some loss of Ge which has been reported by other investigators [14][15][16].…”

Formation of germanium nanocrystals in thick silicon oxide matrix on silicon substrate under rapid thermal annealing

“…The epitaxial regions near the Si-SiO 2 interface have lattice fringes of 0.201 nm separation, which corresponds to the lattice fringe separation of the Ge {2 2 0} plane. Heinig et al [9] and Fukuda et al [10] have also reported such observation of Ge diffusion to the Si-SiO 2 interface for samples annealed at elevated temperatures of 1000 1C.…”

“…This is reasonable as one would expect more Si atoms near the Si-SiO 2 interface and therefore a higher rate of the reduction reaction. Since there exists a complete miscibility of Ge and Si at high annealing temperatures [9,10], one would expect some Ge atoms to diffuse out of the silicon oxide layer and appear at the Si surface. This was not observed for the sample annealed at 800 1C as the annealing temperature was not high enough.…”

“…As the nanocrystals in Region B are spherical and evenly distributed, it suggests nucleation is the dominant mechanism in this region. In fact, Fukuda et al [10] have pointed out that the diffusion of Ge in SiO 2 and nucleation of Ge depend on the annealing temperature. At an annealing temperature of 800 1C, they suggested that only Ge nucleation occurs.…”

Charging effects in Ge nanocrystals embedded in SiO2 matrix for non volatile memory applications

“…Indeed non volatile memories with implanted Ge nanocrystals have been demonstrated [3][4][5]. Isolated nc-Ge in SiO 2 layers can be obtained by various other techniques such as oxidation and reduction of Ge/Si islands [6], UV-assisted oxidation of Si 1Àx Ge x alloys [7], and rapid thermal oxidation (RTO) of ncGe [8][9][10][11] or (Ge + SiO 2 ) [12]. The fabrication of a non volatile memory cell requires a perfect control of 4 main parameters: (i) the tunnel oxide thickness, (ii) the nanocrystal density, (iii) the nanocrystal diameter, and (iv) the control oxide thickness.…”