Grain-Boundary Related Hot Carrier Degradation Mechanism in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

Yoshida, Toshiyuki; Ebiko, Yoshiki; Takei, M.; Sasaki, Nobuo; Tsuchiya, Toshiaki

doi:10.1143/jjap.42.1999

Cited by 17 publications

(16 citation statements)

References 2 publications

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“…11 In poly-Si TFTs, because there are many traps in the poly-Si film, the hot carrier effect is closely related to the crystallization condition and grain boundary locations of the poly-Si film. 12 The degradation of threshold voltage and mobility of devices after self-heating stress is especially a serious problem, because TFTs are fabricated on glass substrates which have the poor thermal conductivity. Most of the previous works focused on the current transfer characteristics to investigate the mechanism of degradation after stress.…”

mentioning

confidence: 99%

Degradation of the Capacitance-Voltage Behaviors of the Low-Temperature Polysilicon TFTs under DC Stress

Tai

Huang

Lin

et al. 2007

J. Electrochem. Soc.

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In this paper, the degradation of n-type low-temperature polycrystalline silicon ͑poly-Si͒ thin-film transistors ͑TFTs͒ under dc stress is investigated with measurement of the capacitance between the source and the gate ͑C GS ͒, as well as the capacitance between the drain and the gate ͑C GD ͒. It is discovered that the degradation in C GD curves of the device after hot carrier stress shows apparent frequency dependence, while that in the C GS curves remains almost the same. A circuit model based on the channel resistance extracted from the current-voltage behavior is proposed to describe the frequency dependence of the capacitance behavior. From this model, it is revealed that the anomalous frequency-dependent capacitance-voltage characteristics may simply reflect the transient behaviors of the channel resistances. Besides, it was found that the C GS curves after self-heating effect exhibit a significant shift in the positive direction and an additional increase for the smaller gate voltage, while the C GD curves show only positive shifts. By employing simulation, it was proved that the self-heating effect creates interface states near the source region and increases the deep states in the poly-Si film near drain. The proposed circuit model further explains the behavior of the C GS and C GD curves for the stressed device at different measuring frequencies.

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mentioning

confidence: 99%

Degradation of the Capacitance-Voltage Behaviors of the Low-Temperature Polysilicon TFTs under DC Stress

Tai

Huang

Lin

et al. 2007

J. Electrochem. Soc.

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“…Although excimer laser crystallization (ELC) is currently a widely employed LTPS technology [2]- [5], recently, metal-induced lateral crystallization (MILC) has been demonstrated as a promising LTPS technology with some unique advantages over other techniques [6]. Currently, highperformance polycrystalline silicon (poly-Si) TFTs have been fabricated by using various technologies [6], [7].…”

mentioning

confidence: 99%

Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Wang

Yang

et al. 2007

IEEE Trans. Electron Devices

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Abstract-Self-heating degradation of n-type metal-induced laterally crystallized polycrystalline silicon thin-film transistors is systematically investigated under various stress powers. A two-stage degradation behavior with turnaround effect at the initial stage is characterized. The initial degradation stage is related to breaking of weak Si-H bonds. The floating-body effect by released hydrogen ions is responsible for the observed backshift of the transfer curve during the initial stress. On the other hand, the normal degradation stage occurs by breaking of strong Si-Si bonds and trap generation at grain boundaries (GBs) and the gate oxide/channel interface. Our model is supported by observed different activation energies related to two degradation stages and a direct observation of the continuous increase in GB trap density during the normal degradation. Furthermore, during the normal degradation stage, an anomalous continuous field-effect mobility increase along with its V g dependence shift is first observed. It is clarified that this behavior is not a true channel mobility increase, but a consequence of stress-related trap generation.Index Terms-Field-effect mobility, metal-induced lateral crystallization, polycrystalline silicon (poly-Si), self-heating (SH) degradation, thin-film transistors (TFTs).

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“…6,7 Some studies have revealed increased subthreshold leakage current as a result of edge leakage. These include metal-induced lateral crystallization, 3 selectively enlarging laser crystallization 4 and sequential lateral solidification 5 ͑SLS͒, to increase the driving current of the transistor.…”

Section: Stress-induced Width-dependent Degradation Of Low-temperaturmentioning

confidence: 99%

“…93, 1926(2003; 10.1063/1.1535732Large-grain polycrystalline silicon films with low intragranular defect density by low-temperature solid-phase crystallization without underlying oxide Phys.…”

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confidence: 99%

Stress-induced width-dependent degradation of low-temperature polycrystalline silicon thin-film transistor

Hsieh

Liang

Lin

et al. 2007

Applied Physics Letters

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Grain-Boundary Related Hot Carrier Degradation Mechanism in Low-Temperature Polycrystalline Silicon Thin-Film Transistors

Cited by 17 publications

References 2 publications

Degradation of the Capacitance-Voltage Behaviors of the Low-Temperature Polysilicon TFTs under DC Stress

Degradation of the Capacitance-Voltage Behaviors of the Low-Temperature Polysilicon TFTs under DC Stress

Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Stress-induced width-dependent degradation of low-temperature polycrystalline silicon thin-film transistor

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