Gold stud bump in flip-chip applications

Jordan, J.F.

doi:10.1109/iemt.2002.1032735

Cited by 26 publications

(10 citation statements)

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“…Table lists the sizes of Group #A-#D bumps. Prior studies determined that the height variation of all bumps on a die should not exceed 5 μm [2]. Group #A-#D bumps met this requirement and thus are considered to have relatively low height variation.…”

Section: Gold Stud Bumpingmentioning

confidence: 98%

“…Currently, there are two methods to perform the coining process: Thermo-compression and thermosonic compression. The former typically requires the use of heats as high as 350~400 [2]. In this paper, we utilize the latter.…”

Section: Introductionmentioning

confidence: 98%

“…Again, ball shear test is performed to evaluate the bond strength of the coined gold stud bumps. The four leading methods for flip chip attaching are non-conductive epoxy, conductive epoxy, thermo-compression, and thermosonic compression [2]. We utilize thermosonic compression to bond the chip on the submount.…”

Section: Introductionmentioning

confidence: 99%

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Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

Ren

Qiu

et al. 2016

2016 China Semiconductor Technology International Conference (CSTIC)

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The effects of various parameters on the flip chip assembly with gold stud bumps are investigated. Silicon chips and submounts with Kelvin structures are fabricated as test vehicle. Gold stud bumping parameters are adjusted to obtain an optimal bump shape. The stud bump bonding strength is evaluated by ball shear tests. A thermosonic compression process, known as coining, is performed to reduce the height variation of the bumps. The coining parameters are studied and optimized. The ball shear strength of the coined bumps is evaluated. The chip bonding parameters are evaluated and optimized. The die shear strength and the electrical resistance after flip chip bonding are measured and discussed.

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Section: Gold Stud Bumpingmentioning

confidence: 98%

Section: Introductionmentioning

confidence: 98%

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Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

Ren

Qiu

et al. 2016

2016 China Semiconductor Technology International Conference (CSTIC)

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“…Current bumping methods include electroplating and stencil/screen printing of solder bumps on the contact pads of integrated circuit (IC) wafers [1]. Chip bumping using gold studs is also widely used [2]. Recently, we reported a chip bumping method using copper columns and a laser assisted approach, in which copper columns were fabricated on a quartz carrier and then transferred onto a chip using a laser release method [3].…”

Section: Introductionmentioning

confidence: 99%

A Low Cost Bumping Method for Flip Chip Assembly and MEMS Integration

Zhang

Wang

Zeng

et al. 2007

IEEE Trans. Comp. Packag. Technol.

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In this paper, we present the development of a low cost chip/wafer bumping technique for flip chip assembly and microelectromechanical systems integration using a bump transfer approach. In this method, high melting temperature bumps such as copper, nickel, and gold bumps are fabricated on a low cost, flexible carrier and then transferred onto the target chip/wafer/board for flip chip assembly. The aluminum pads on test chips were remetallized with electroless nickel and gold layers to facilitate the bonding of bumps to the chips using thermocompression bonding. Parallel bonding and transfer of bumps has been achieved. Thermal cycling and bump shear test showed that reliable bonding was obtained between the bumps and the pads. Surface study using laser ionization mass analysis found no traces of of the polymer carrier on the surface of the bumps on the test chip after the completion of the bump transfer process.Index Terms-Bumping, flexible carrier, flip chip, microelectromechanical systems (MEMS).

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“…And the stud bump process is a modified version of the standard wire bonding process. To form the stud bump, gold wire bonds are attached to the pads of the die and then melting at their end to obtain a ball [5].…”

Section: A Flip-chip Assemblymentioning

confidence: 99%

A differential SiP (LNA-filter-mixer) in silicon technology for the SKA project

Grima

Barth

Bosse

et al. 2007

2007 European Microwave Conference

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Abstract-This paper describes two filters realised in a technology entirely dedicated to passive components and which allows active dies flip-chip by means of bumps. Then, it presents the design of a SiP (System in Package) constituted of a differential LNA (Low Noise Amplifier) and mixer flipped respectively in front and back of a balanced filter. Measurements of a SiP, where just the LNA is flipped onto the filter, are shown in the last part.

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Gold stud bump in flip-chip applications

Cited by 26 publications

References 0 publications

Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

A Low Cost Bumping Method for Flip Chip Assembly and MEMS Integration

A differential SiP (LNA-filter-mixer) in silicon technology for the SKA project

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