Experimental parametric study on the bumping and coining of gold studs for flip chip bonding

Abstract

The effects of various parameters on the flip chip assembly with gold stud bumps are investigated. Silicon chips and submounts with Kelvin structures are fabricated as test vehicle. Gold stud bumping parameters are adjusted to obtain an optimal bump shape. The stud bump bonding strength is evaluated by ball shear tests. A thermosonic compression process, known as coining, is performed to reduce the height variation of the bumps. The coining parameters are studied and optimized. The ball shear strength of the coined bumps is evaluated. The chip bonding parameters are evaluated and optimized. The die shear strength and the electrical resistance after flip chip bonding are measured and discussed.