Germanium Nanosheet-FETs Scaled to Subnanometer Node Utilizing Monolithically Integrated Lattice Matched Ge/AlAs and Strained Ge/InGaAs

Abstract

is possible, and a significant boost in ION (~ 4×) is obtained with 8 layers despite of parasitics induced selfloading. In applications requiring high drive current, increasing the number of stacked Ge nanosheets is the most efficient design pathway to improve circuit delay and area-delay-product. This system shows suitability for low-power and high-performance applications for dimensions down to N0.7, where the ION is ~ 0.6mA/µm and the SS is 81 mV/dec.

Carrier Recombination Dynamics of Surface-Passivated Epitaxial (100)Ge, (110)Ge, and (111)Ge Layers by Atomic Layer Deposited Al2O3

“…In addition, downscaling of silicon (Si) transistors was possible by changing the device geometry from planar to fin field effect transistors (FinFETs). Researchers are now looking into gate-all-around nanosheet FETs (NSFETs) − and high-mobility Ge channel material, to maintain transistor ON current, while reducing supply voltage and footprint. − In the former, crystallographic planes of (100)Si and (110)Si along with HfO 2 -based high-κ gate dielectrics were used for high-performance, low-power Si CMOS logic down to the N3 technology node, , enabling increased integration of complex functionality on a single die. The integration of high-κ gate dielectrics such as HfO 2 and Al 2 O 3 on (100) and (110) crystal planes should not produce defects due to the effect of process temperature during deposition, rather only passivating the surface states and eliminating the interdiffusion of high-κ dielectric and channel materials. , Using these technologically important crystal planes, (100) and (110), from high electron and hole mobility Ge channel materials compared with Si along with a high-κ dielectric, one could make FinFET , or gate-all-around (GAA) NSFET − for high-density and ultralow-power CMOS.…”

“…Thus, a high carrier lifetime characterizes reduced loss of accumulated/inverted carriers due to recombination at the high-κ/Ge heterointerface, which is essential during the fabrication of an NSFET from either Si, Ge, or GeSn. In this NSFET structure, a high-κ dielectric by ALD is required to form a conformal growth along the four sides of a nanosheet transistor, − where the two (100) and two (110) crystal planes form an NSFET similar to two (110) and one (100) crystal plane forming a trigate/FinFET device, , and Figure shows the schematic representation of a Ge FinFET structure on a GaAs or Si substrate. During the ALD-deposited gate dielectric, such as Al 2 O 3 on these crystal planes, one must maintain the low D it − by decreasing surface states, and probing passivated Al 2 O 3 /(100)Ge and Al 2 O 3 /(110)Ge heterointerface recombination properties related to the carrier lifetime would offer valuable information to the scientific community as well as an impactful technological contribution.…”

“…The μ-PCD data display carrier lifetimes of 65 to 540 ns for the orientation-specific Ge layer, indicating a strong dependence on surface orientation and surface passivation. Thus, the orientation-specific carrier lifetime in Al 2 O 3 -passivated Ge layers would have a prospect for future development of Ge-based nanosheet transistors , and nanoscale fin transistors. ,, …”

“…Researchers are now looking into gate-all-around nanosheet FETs (NSFETs) 16−22 and high-mobility Ge channel material, to maintain transistor ON current, while reducing supply voltage and footprint. 16−22 In the former, crystallographic planes of (100)Si and (110)Si along with HfO 2 -based high-κ gate dielectrics were used for high-performance, low-power Si CMOS logic down to the N3 technology node, 20,21 enabling increased integration of complex functionality on a single die. The integration of high-κ gate dielectrics such as HfO 2 and Al 2 O 3 on (100) and (110) crystal planes should not produce defects due to the effect of process temperature during deposition, rather only passivating the surface states and eliminating the interdiffusion of high-κ dielectric and channel materials.…”

“…These Ge layers were grown on differently oriented GaAs substrates to create an orientation-specific epitaxial layer by solid source molecular beam epitaxy (MBE). An approximately 10 nm thick ALD Al 2 O 3 layer was deposited on three different oriented 20,21 and nanoscale fin transistors. 20,26,27 2.…”