Generalized matrix method for efficient residue to decimal conversion

Gbolagade, Kazeem Alagbe; Cotofana, Sorin

doi:10.1109/apccas.2008.4746295

Cited by 5 publications

(8 citation statements)

References 10 publications

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“…The hardware implementations of the proposed reverse converters are based on the combination of (25) and (5). We propose two converters based on this approach, termed "hybrid approach".…”

Section: Hardware Realizationmentioning

confidence: 99%

“…Many different choices of moduli sets are available for RNS to represent the binary numbers in a certain range. Three moduli sets have been actively investigated, for example, {2 n − 1, 2 n , 2 n + 1} [3], {2 n , 2 n − 1, 2 n−1 − 1} [4], {2n + 1, 2n − 1, 2n} [5], and {2n + 2, 2n + 1, 2n} [6]. The dynamic range of these moduli sets is not sufficient for applications requiring larger dynamic range.…”

Section: Introductionmentioning

confidence: 99%

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New Adder-Based RNS-to-Binary Converters for the Moduli Set

Gbolagade

2011

ISRN Signal Processing

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We investigate Residue Number System (RNS) to binary conversion, which is an important issue concerning the utilization of RNS numbers in Digital Signal Processing (DSP) applications. We propose two new reverse converters for the moduli set . First, we simplify the Chinese Remainder Theorem (CRT) to obtain a reverse converter that uses mod- operations instead of mod- operations required by other state-of-the-art equivalent converters. Next, we further reduce the hardware complexity by making the resulting reverse converter architecture adder based. Two hybrid Cost-Efficient (CE) and Speed-Efficient (SE) reverse converters are proposed. These two hybrid converters are obtained by combining the best state-of-the-art converter with the newly introduced area-delay efficient scheme. The proposed hybrid CE converter outperforms the best state-of-the-art CE converter in terms of delay with similar area cost. Additionally, the proposed hybrid SE converter requires less area cost with smaller delay when compared to the best state-of-the-art equivalent SE converter.

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“…The hardware implementations of the proposed reverse converters are based on the combination of (25) and (5). We propose two converters based on this approach, termed "hybrid approach".…”

Section: Hardware Realizationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

New Adder-Based RNS-to-Binary Converters for the Moduli Set

Gbolagade

2011

ISRN Signal Processing

Self Cite

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“…In RNS, an integer is decomposed into a set of smaller integers i.e. with shorter binary representations, which can be processed independently and in parallel [9], [12]. This basis of RNS is set of pair wise prime integers S = {m1,m2, ,mn}, where gcd (mi,mj) = 1 for i = j.…”

Section: Introductionmentioning

confidence: 99%

RNS Bases in Computer Architecture for DNA Sequence Application

Olatunbosun

Adam²,

Gbolagade

2020

int. jour. eng. com. sci

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In this paper we present an RNS algorithm and architecture implementation of gene sequence applications based on an existing RNS arithmetic algorithm. Investigation was made on RNS application and its inherent arithmetic advantages; data conversion algorithm from Decimal/Binary to RNS; the forward conversion; Conversion from RNS to Binary/Decimal; the reverse conversion using the Chinese remainder theorem CRT, conversion from RNS to mixed radix form with capability for effective computation performance, and analysis of Smith Waterman Algorithm based on DNA sequence computing. Its limitations and open issues for future research were highlighted.

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“…There is performance degradation in computing hardware built based on Weighted Number System (WNS) due to carry propagation phenomenon inherent to WNS [3]. The reduction/elimination of carry chains is the major challenge in improving computer arithmetic performance.…”

Section: Introductionmentioning

confidence: 99%

“…The reduction/elimination of carry chains is the major challenge in improving computer arithmetic performance. Several approaches have been proposed, e.g., carry look ahead, prefix calculations, anticipated calculations, and alternative number representation systems, e.g., (redundant) signed digit systems, or Residue Number Systems (RNS) [3].…”

Section: Introductionmentioning

confidence: 99%

RNS Overflow Detection by Operands Examination

Siewobr¹,

Gbolagade²

2014

IJCA

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In this paper, a novel scheme for detecting overflow in Residue Number System (RNS) is presented. A generalized scheme for RNS overflow detection is introduced, followed by a simplified Operands Examination Method for overflow detection for the moduli set . The proposed method detects overflow in RNS addition of two numbers without pre-computing their sum .Moreover, when compared with the best known similar state of the art designs, the proposed scheme requires lesser hardware, eruder htr izre heit epr and is faster.

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Generalized matrix method for efficient residue to decimal conversion

Cited by 5 publications

References 10 publications

New Adder-Based RNS-to-Binary Converters for the Moduli Set

New Adder-Based RNS-to-Binary Converters for the Moduli Set

RNS Bases in Computer Architecture for DNA Sequence Application

RNS Overflow Detection by Operands Examination

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