General Log-Likelihood Ratio Expression and Its Implementation Algorithm for Gray-Coded QAM Signals

Kim, Ki Seol; Hyun, Kwangmin; Yu, Chang Wahn; Park, Youn Ok; Yoon, Dongweon; Park, Soo Young

doi:10.4218/etrij.06.0105.0161

Cited by 17 publications

(3 citation statements)

References 11 publications

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“…Without loss of generality, we consider a scheme with one relay node only ; thus, we remove the subscripts of the node relation for simplicity. Since calculating the exact bit LLR by using the conventional MLD is excessively exorbitant, there are a few ways proposed to approximate bit LLR values like in [14,15] whose aim is to avoid the high computation from the exact bit LLR expression. Although by using the conventional MLD the optimum performance can be achieved, the approach requires computation which grows exponentially with the constellation size of the modulation schemes.…”

Section: Derivation Of Symbol Llr Based On Mld and Expected Value Of mentioning

confidence: 99%

A Simple Symbol Estimation for Soft Information Relaying in Cooperative Relay Channels

Aziz¹,

Iwanami²

2011

IJCNS

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This paper proposes Symbol-based Soft Forwarding (SSF) protocol for coded transmissions which is based on a simple proposed soft symbol estimation at relay nodes. We present a simple strategy of forwarding soft information based on a simple linear summation of likelihood functions of each symbol. Specifically, with SSF, we demonstrate that exclusion of decoding at the relays costs no significant performance loss. To validate our claims, we examine bit error rate (BER) performance for the proposed scheme against the baseline SF scheme through computer simulations. We find that the proposed scheme can obtain considerable performance gains compared to the conventional relaying protocol

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Section: Derivation Of Symbol Llr Based On Mld and Expected Value Of mentioning

confidence: 99%

A Simple Symbol Estimation for Soft Information Relaying in Cooperative Relay Channels

Aziz¹,

Iwanami²

2011

IJCNS

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“…Based on the results of a thorough literature search and deep analysis, we find the following algorithms having remarkable reduced complexity without compromising on quality of communications performance: (1) the algorithm reported in Lin et al (2010) identifies the two required constellation points to compute one LLR in a very simple way and (2) The algorithms reported in Tosato and Bisaglia (2002); Ryoo et al (2003); Kim et al (2006); Arar et al (2007); and Sun and Zeng (2011) are quite similar to each other and provide a very simple approach to compute LLR. We call this approach as decision threshold algorithm in this sequel.…”

Section: Introductionmentioning

confidence: 99%

A high throughput architecture for a low complexity soft-output demapping algorithm

2015

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Abstract. Iterative channel decoders such as Turbo-Code and LDPC decoders show exceptional performance and therefore they are a part of many wireless communication receivers nowadays. These decoders require a soft input, i.e., the logarithmic likelihood ratio (LLR) of the received bits with a typical quantization of 4 to 6 bits. For computing the LLR values from a received complex symbol, a soft demapper is employed in the receiver. The implementation cost of traditional soft-output demapping methods is relatively large in high order modulation systems, and therefore low complexity demapping algorithms are indispensable in low power receivers. In the presence of multiple wireless communication standards where each standard defines multiple modulation schemes, there is a need to have an efficient demapper architecture covering all the flexibility requirements of these standards. Another challenge associated with hardware implementation of the demapper is to achieve a very high throughput in double iterative systems, for instance, MIMO and Code-Aided Synchronization. In this paper, we present a comprehensive communication and hardware performance evaluation of low complexity soft-output demapping algorithms to select the best algorithm for implementation. The main goal of this work is to design a high throughput, flexible, and area efficient architecture. We describe architectures to execute the investigated algorithms. We implement these architectures on a FPGA device to evaluate their hardware performance. The work has resulted in a hardware architecture based on the figured out best low complexity algorithm delivering a high throughput of 166 Msymbols/second for Gray mapped 16-QAM modulation on Virtex-5. This efficient architecture occupies only 127 slice registers, 248 slice LUTs and 2 DSP48Es.

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“…Since the computation of the LLRs can be pricey [27], good approximations of the LLRs are used. For the Gray coded Mj-QAM schemes described by (4.13), the LLR can be well approximated by the following recursive expression [27][28][29] Si,jKi+k d M Jl{a*r%}, k = 0…”

Section: Soft-bit Maximum Likelihood Detector (Sbmld)mentioning

confidence: 99%

Diversity combining of signals with different modulation levels and constellation rearrangement in cooperative relay networks

Sediq¹,

Salem²

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General Log-Likelihood Ratio Expression and Its Implementation Algorithm for Gray-Coded QAM Signals

Cited by 17 publications

References 11 publications

A Simple Symbol Estimation for Soft Information Relaying in Cooperative Relay Channels

A Simple Symbol Estimation for Soft Information Relaying in Cooperative Relay Channels

A high throughput architecture for a low complexity soft-output demapping algorithm

Diversity combining of signals with different modulation levels and constellation rearrangement in cooperative relay networks

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