Ge2Sb2Te5 Confined Structures and Integration of 64 Mb Phase-Change Random Access Memory

Yeung, F.; Ahn, Su−Jin; Hwang, Y.N.; Jeong, Changwook; Song, Y. J.; Lee, Su-Youn; Lee, Se-Ho; Ryoo, Kyung−Chang; Park, Jae-Hyun; Shin, Jaemin; Jeong, Won−Cheol; Kim, Young-Tae; Koh, G.H.; Jeong, Gitae; Jeong, Hae-Yong; Kim, Kinam

doi:10.1143/jjap.44.2691

Cited by 50 publications

(22 citation statements)

References 3 publications

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“…[1][2][3][4][5][6][7][8][9][10] In both the optical and electrical phase-change data storage methods, data are written by locally melt quenching the crystalline phase-change film into an amorphous state using an optical ͑laser͒ or electrical pulse. The written amorphous bit can be read due to its large optical ͑reflectivity͒ or electrical ͑resistivity͒ contrast with the surrounding crystalline background.…”

Section: Influence Of Capping Layers On the Crystallization Of Doped mentioning

confidence: 99%

Influence of capping layers on the crystallization of doped SbxTe fast-growth phase-change films

Pandian

Kooi

Hosson

et al. 2006

Journal of Applied Physics

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Isothermal crystallization of doped Sb x Te fast-growth phase-change films, with and without capping layers, was investigated using transmission electron microscopy, which provided direct and quantitative information on nucleation and growth processes separately. Two types of amorphous dielectric layers, ZnS -SiO 2 and GeCrN, were used for sandwiching the Sb x Te films to form typical trilayer stacks, which are the active part in applications. The nucleation and growth parameters of Sb x Te films were found to be influenced by the dielectric capping layers. The crystal growth rate is temperature dependent and it reduces when the film is sandwiched between the dielectric layers. The reduction in growth rate differs with the capping layer type. The capping layer influence on the growth rate is pronounced at lower temperatures ϳ160°C, but tends to vanish at higher temperatures ϳ200°C. The activation energy for crystal growth is 2.4± 0.3 eV for an uncapped film and it increases ϳ40% when the capping layers, GeCrN or ZnS -SiO 2 , are added. A temperature and time dependent nucleation rate is found and it is accelerated ϳ1.7 times by GeCrN layers, whereas it is retarded ϳ5 times by ZnS -SiO 2 layers. The activation energy for crystal nucleation is 6.1± 0.4 eV for an uncapped film and it is not noticeably altered by the capping layers. These variations observed in the crystallization kinetics are attributed to variations in interface energy between the phase-change film and the capping layers or vacuum and the confinement effect by the capping layers on the phase-change film.

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Section: Influence Of Capping Layers On the Crystallization Of Doped mentioning

confidence: 99%

Influence of capping layers on the crystallization of doped SbxTe fast-growth phase-change films

Pandian

Kooi

Hosson

et al. 2006

Journal of Applied Physics

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“…Since the endurance characteristic of PRAM has been reported to be approximately from 10 7 to 10 9 cycles [1,3,10], it is sufficient for the replacement of NOR flash memory, which is regarded as the first goal for commercial-level PRAM. However, to extend the application of PRAM to areas demanding powerful functions, additional improvement of device reliability is required in the near future.…”

Section: Introductionmentioning

confidence: 99%

Nanoscale observations of the operational failure for phase-change-type nonvolatile memory devices using Ge2Sb2Te5 chalcogenide thin films

Yoon

Choi

Lee

et al. 2007

Applied Surface Science

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“…Due to repeated heating, a PCM cell can be reliably written only a limited number of times, which is referred to as write endurance. While an individual PCM cell can handle 10 12 write cycles [Lai and Lowrey 2001], experiments with PCM arrays and chips have shown much lower endurance in the range of 10 7 -10 9 writes [Burr et al 2010;ITRS 2009;Yeung et al 2005]. Write endurance is a significant obstacle that restricts PCM from serving as an immediate and widespread replacement for DRAM.…”

Section: Errors In Phase Change Memorymentioning

confidence: 99%

“…One major drawback is poor write endurance; a PCM cell can be reliably written only a restricted number of times. It has been reported that PCM chips can survive only 10 7 to 10 9 write cycles [Burr et al 2010;ITRS 2009;Yeung et al 2005]. This write endurance is significantly worse than DRAM, which promises at least 10 15 write cycles.…”

Section: Introductionmentioning

confidence: 99%

Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory

Jiang

Zhao

et al. 2013

ACM Trans. Archit. Code Optim.

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Phase Change Memory (PCM) has recently emerged as a promising memory technology. However, PCM's limited write endurance restricts its immediate use as a replacement for DRAM. To extend the lifetime of PCM chips, wear-leveling and salvaging techniques have been proposed. Wear-leveling balances write operations across different PCM regions while salvaging extends the duty cycle and provides graceful degradation for a nonnegligible number of failures.Current wear-leveling and salvaging schemes have not been designed and integrated to work cooperatively to achieve the best PCM device lifetime. In particular, a noncontiguous PCM space generated from salvaging complicates wear-leveling and incurs large overhead. In this article, we propose LLS, a Line-Level mapping and Salvaging design. By allocating a dynamic portion of total space in a PCM device as backup space, and mapping failed lines to backup PCM, LLS constructs a contiguous PCM space and masks lowerlevel failures from the OS and applications. LLS integrates wear-leveling and salvaging and copes well with modern OSes. Our experimental results show that LLS achieves 31% longer lifetime than the state-of-theart. It has negligible hardware cost and performance overhead.

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Ge₂Sb₂Te₅ Confined Structures and Integration of 64 Mb Phase-Change Random Access Memory

Cited by 50 publications

References 3 publications

Influence of capping layers on the crystallization of doped SbxTe fast-growth phase-change films

Influence of capping layers on the crystallization of doped SbxTe fast-growth phase-change films

Nanoscale observations of the operational failure for phase-change-type nonvolatile memory devices using Ge2Sb2Te5 chalcogenide thin films

Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory

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