Fully Symmetrical Monolithic Transformer (True 1 : 1) for Silicon RFIC

Lim, Jonathan Chee Woei; Yeo, Kiat Seng; Chew, Kok Wai; Cabuk, Alper; Gu, Jianlan; Lim, Suh Fei; Boon, Chirn Chye; Anh, Manh

doi:10.1109/tmtt.2008.2003531

Cited by 37 publications

(6 citation statements)

References 22 publications

(28 reference statements)

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“…Then the initial values of the parasitic oxide capacitances and substrate network are computed from the admittances of the Y ‐parameters as defined in “(16),” based on the devised geometrical layout 40 . The constitutive lumped circuit elements, oxide and substrate capacitances, and resistances are derived as in (17) and (18)

C_{i} = [\frac{ε_{- die} A}{t_{- die}} / ω] (high - freq (GHz))

C_{sub (i)} = (2 \times ε_{- sub} \times A) / t_{- sub}

R_{sub (i)} = 1 / (π \times σ_{- sub} \times {normalℓ}_{_mean})

Where C ( i ) represents either the oxide or pad capacitance and their respective resistances R pad( i ) and R ox( i ) are obtained through an optimization algorithm,

ℓ_{- mean}

denoting the mean parameter of each inductor coil.…”

Section: The Parameter Extraction Methodologymentioning

confidence: 99%

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Analysis of on‐chip GSG pads coupling effects on laterally‐coupled and double‐stacked inductors in the millimeter‐wave frequency regime

Mawuli

Kang

2023

Int J Numerical Modelling

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On‐chip coupled inductors express huge nonuniform coupling tendencies, especially as frequency increases. This though desirable for wireless/galvanically isolated signal transfer but when mixed with the ground‐signal‐ground (GSG) pad could lead to a misrepresentative of the device's true coupling performance. To determine the coupling between the coupled inductors and that of the GSG pad an integrator analytical model investigating the total coupling effects of the GSG pad on laterally‐coupled and stacked inductors is presented in this study. The model characterizes the lateral and vertical coupling effects using lumped circuit elements with analytical equations. The coupling effects of each component are further decomposed and analyzed as electrical, magnetic, and combined effects. The electrical coupling effect, particularly that of the GSG pad, increases with frequency and impacts significantly on the coupled inductors and the substrate. The mm‐wave frequency characteristics such as skin and proximity effects of the inductors are also modeled by the double RL ladder network. The parameter extraction of the model is based on the measured S‐parameter data. The validation of the proposed model given the measured scattering parameter S21 dB achieves an RMSE of 0.0132 dB at 50 GHz. The inductor typology is most applicable to two‐port networks for impedance matching, cross‐coupled VCOs, and high‐speed communication networks.

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C_{i} = [\frac{ε_{- die} A}{t_{- die}} / ω] (high - freq (GHz))

C_{sub (i)} = (2 \times ε_{- sub} \times A) / t_{- sub}

R_{sub (i)} = 1 / (π \times σ_{- sub} \times {normalℓ}_{_mean})

Where C ( i ) represents either the oxide or pad capacitance and their respective resistances R pad( i ) and R ox( i ) are obtained through an optimization algorithm,

ℓ_{- mean}

denoting the mean parameter of each inductor coil.…”

Section: The Parameter Extraction Methodologymentioning

confidence: 99%

“…Then the initial values of the parasitic oxide capacitances and substrate network are computed from the admittances of the Y-parameters as defined in "( 16)," based on the devised geometrical layout. 40 The constitutive lumped circuit elements, oxide and substrate capacitances, and resistances are derived as in ( 17) and ( 18)…”

Section: Shunt Branch Extractionmentioning

confidence: 99%

Analysis of on‐chip GSG pads coupling effects on laterally‐coupled and double‐stacked inductors in the millimeter‐wave frequency regime

Mawuli

Kang

2023

Int J Numerical Modelling

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“…Many other methods for quality factor improvement also exist. Partial substrate removal/oxidation [16,[19][20][21], patterned ground shields [22], and differentially-driven symmetric inductors [11,12] can all be used to mitigate substrate parasitic effects. Multilayer stacking processes have been utilized to increase the inductance density [7], while alternating interconnections between each layer similar to bulk-scale basket winding techniques can be further employed to increase the self-resonant frequency [23].…”

Section: Introductionmentioning

confidence: 99%

“…

In order to overcome core losses, integrated aircore spiral inductors operating in the very-high frequency (VHF, 30-300 MHz) to ultra-high frequency (UHF, 0.3-3 GHz) range have been demonstrated to be a feasible alternative to magnetic core inductors [7,8], finding applications in fields such as ultra-compact power converters [9, 10], radio frequency filtering and impedance matching [11,12], electromagnetic sensing [13,14], and wireless power [15]. Since the performance of these circuits are mainly limited by the performance of the inductor, various methods have been developed

…”

mentioning

confidence: 99%

3D electroplated inductors with thickness variation for improved broadband performance

Tseng

Bedair

Lazarus

2016

J. Micromech. Microeng.

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The performance of an RF spiral inductor is based on the balance between ohmic losses in the outer turns and eddy current losses dominant in the inner turns where the magnetic field is the strongest. In this work, air-core spiral inductors with winding trace thicknesses decreasing towards the center are demonstrated, achieving quality factor improvement over a wide frequency range compared to uniform thickness inductors. A custom 3D copper electroplating process was used to produce spiral inductors with varying winding thicknesses in a single plating step, with patterned gaps in a seed layer used to create delays in the vertical plating. The fabricated center-lowered coil inductors were 80 nH within a one square millimeter area with thickness varying from 60 µm to 10 µm from outer to inner winding. Within the 16 MHz–160 MHz range, the center-lowered inductors were shown to have a maximum to minimum quality factor improvement of 90%–10% when compared to uniform thickness inductors with thicknesses ranging from 60 µm to 10 µm. Compared to the 20 µm uniform thickness inductor which has the optimal performance among all uniform thickness inductors in this frequency range, the center-lowered inductors were shown to achieve a maximum quality factor improvement of 20% at the edge frequencies of 16 MHz and 160 MHz, and a minimum quality factor improvement of 10% near the geometric mean center frequency of 46 MHz.

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“…2), as suggested in Refs. [5,8]. Considering that the primary coil located over the gap between port 2 and port 4 is directly coupled with the substrate, block F is introduced to model this structure, which also characterizes the non-ideal parasitics between the primary coil and the substrate, including the side-wall capacitance from the primary coils to the substrate.…”

Section: Introductionmentioning

confidence: 99%

A novel compact model for on-chip stacked transformers in RF-CMOS technology

Liu¹,

Wen²,

Zhao³

et al. 2013

J. Semicond.

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A novel compact model for on-chip stacked transformers is presented. The proposed model topology gives a clear distinction to the eddy current, resistive and capacitive losses of the primary and secondary coils in the substrate. A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided. The model is further verified by the excellent match between the measured and simulated S-parameters on the extracted parameters for a 1 : 1 stacked transformer manufactured in a commercial RF-CMOS technology.

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Fully Symmetrical Monolithic Transformer (True 1 : 1) for Silicon RFIC

Cited by 37 publications

References 22 publications

Analysis of on‐chip GSG pads coupling effects on laterally‐coupled and double‐stacked inductors in the millimeter‐wave frequency regime

Analysis of on‐chip GSG pads coupling effects on laterally‐coupled and double‐stacked inductors in the millimeter‐wave frequency regime

3D electroplated inductors with thickness variation for improved broadband performance

A novel compact model for on-chip stacked transformers in RF-CMOS technology

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