Fully printed silicon field effect transistors

Abstract

This letter demonstrates the use of a traditional screen printing approach for the fabrication of silicon field effect transistors. Using purely additive patterning technologies at room temperature conditions, with no additional postprocessing steps, transistors have been produced on paper substrates that have performance characteristics comparable to amorphous silicon thin film transistors. Insulated gate field effect transistors employing n type silicon in the semiconductor layer operate in accumulation mode with effective carrier mobilities in the range 0.3 to 0.7 cm2 (V s)−1.

A novel mode of current switching dependent on activated charge transport

“…6,7 n-type and p-type particles were produced by milling highly doped (phosphorous and boron, respectively) single crystalline wafers with an initial resistivity lower than 0.005 cm. Screen printable silicon inks were prepared by addition of silicon powder to an acrylic emulsion ink base (which contains <10% solid fraction), with reagent grade propylene glycol as a thinner, so that the final weight proportions of silicon to binder were 80:20.…”

“…Screen printable silicon inks were prepared by addition of silicon powder to an acrylic emulsion ink base (which contains <10% solid fraction), with reagent grade propylene glycol as a thinner, so that the final weight proportions of silicon to binder were 80:20. 7 The consistency of the ink was then adjusted such that the rheology of the ink remained dilatent and thixotropic.…”

“…Typically for the material used here, the primary clusters contain 600 ± 200 individual particles, and have a size of approximately 500 nm. 13 The individual silicon particles are polycrystalline, with a typical grain size of 10 nm and have predominantly (111) faceted surfaces 7,11 which have no noticeable oxide shell. 7 The combination of a highly interconnected network of particles with many interfaces between particles along any percolation path leads to a thermally activated hopping transport of charge (see supplementary online text).…”

“…13 The individual silicon particles are polycrystalline, with a typical grain size of 10 nm and have predominantly (111) faceted surfaces 7,11 which have no noticeable oxide shell. 7 The combination of a highly interconnected network of particles with many interfaces between particles along any percolation path leads to a thermally activated hopping transport of charge (see supplementary online text). It is this property, which forms the basis for the application of this material system in commercially available printed thermistors, 14 and, more importantly, which enables the current switching function presented here.…”

“…Here we demonstrate a fully printed electronic device with a similar triode configuration, using nanoparticulate silicon as the semiconductor material, 6,7 which has a unique mode of operation as an electrically controlled two-way (double throw) switch. By analogy with the junction transistor and the vacuum tube, we denote the electrodes as emitter, base and collector.…”