Fully integrated AC coupled interconnect using buried bumps

A 36Gb/s ACCI Multi-Channel Bus using a Fully Differential Pulse Receiver

“…The other is the swing limited area, which is limited by small coupling capacitors or a longer T-line. For a detailed discussion of these trade-offs, refer to [5,7]. Simulations using a 90nm CMOS technology show operation up to 12.5Gb/s for T-line lengths of 10cm to 20cm using 100fF to 200fF coupling capacitors.…”

“…The use of capacitively coupled I/O and pulse signaling was proposed as one solution to this problem and has been investigated by numerous groups [1][2][3][4][5][6]. Capacitive coupling can be created by using on-chip metal-insulator-metal (MIM) capacitors, as reported in this paper, or by creating an inter-chip/package capacitor as reported in [7]. Capacitive coupling has also been used in 3D-ICs stacks for inter-chip communication [2][3].…”

“…The passive filtering comes from the high-pass frequency response of the small series coupling capacitors and the pulse receiver is used to restore received data to full swing NRZ levels. For a detailed discussion of these trade-offs, refer to [5,7].…”

“…While noise immunity and receiver sensitivity impose a minimum on the amplitude and duration of the received pulse, defining noise margins for pulse signaling [8]. These criteria set a lower bound on the minimum coupling capacitor size and transmitter drive strength for a range of transmission line lengths [5,7].…”

“…The main issue is to minimize the DC wander that arises from the high-pass filtering of the series capacitor. In ACCI, a small series capacitor is used to convert a full swing NRZ data stream into a bipolar pulse data stream [5][6][7][8]. This is accomplished by signaling through a series capacitor that is small enough to create a pulse with a duration that is less than or equal to the period of the maximum signaling rate.…”