Front end of line considerations for progression beyond the 100 nm node ultrashallow junction requirements

Cleavelin, C.R.; Covington, B. C.; Larson, Larry L.

doi:10.1116/1.591196

Cited by 6 publications

(1 citation statement)

References 25 publications

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“…40 In order to minimize dopant diffusion and maximize implantation-induced defect removal, hightemperature ͑Ͼ1000°C͒ anneals for very short times are desirable. These elevated temperatures can wreak havoc with strained Si/SiGe heterostructures, leading to strain relaxation in metastable films and dopant and Ge diffusion into strained Si channels.…”

Section: Thermal Budget Determinationmentioning

confidence: 99%

Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates

Currie

Leitz

Langdo

et al. 2001

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

248

141

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Strained Si n -channel metal-oxide-semiconductor field-effect transistors formed on very thin SiGe relaxed layer fabricated by ion implantation technique Appl. Phys. Lett. 90, 202101 (2007); 10.1063/1.2739324 Asymmetric strain relaxation in patterned SiGe layers: A means to enhance carrier mobilities in Si cap layers Appl. Phys. Lett. 90, 032108 (2007); 10.1063/1.2431702High-quality strain-relaxed SiGe alloy grown on implanted silicon-on-insulator substrate Surface channel strained Si metal-oxide-semiconductor field-effect transistors ͑MOSFETs͒ are a leading contender for future high performance complementary metal-oxide-semiconductor ͑CMOS͒ applications. The carrier mobility enhancement of these devices is studied as a function of channel strain, and the saturation behavior for n-and p-channel devices is compared. Carrier mobility enhancements of up to 1.8 and 1.6 are achieved for n-and p-channel devices, respectively. The process stability of strained Si MOSFETs is also studied, and carrier mobility enhancement is shown to be robust after well implantation and virtual substrate planarization steps. The effects of high-temperature implant activation anneals are also studied. While no misfit dislocation introduction or strain relaxation is observed in these devices, increased interface state densities or alloy scattering due to Ge interdiffusion are shown to decrease mobility enhancements. Channel thickness effects are also examined for strained Si n-MOSFETs. Loss of carrier confinement severely limits the mobility of devices with the thinnest channels. Overall, surface channel strained Si MOSFETs are found to exhibit large carrier mobility enhancements over coprocessed bulk Si devices. This, combined with the high process stability exhibited by these devices, makes them superb candidates for future CMOS applications.

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Section: Thermal Budget Determinationmentioning

confidence: 99%

Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates

Currie

Leitz

Langdo

et al. 2001

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

248

141

View full text Add to dashboard Cite

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Mechanisms and application of the Excimer laser doping from spin-on glass sources for USJ fabrication

Coutanson¹,

Fogarassy²,

Venturini

2006

Applied Surface Science

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Characterization of the Source/Drain Region in Mos Devices by Scanning Transmission Electron Microscopy

Topuria¹,

Browning

2001

Microsc Microanal

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The advancement of metal-oxide-semiconductor (MOS) technology towards sub- 100nm device dimensions presents several technical difficulties. Nanoscaling in MOS devices is specifically governed by difficulties in the formation of ultrashallow junctions for the source/drain regions with the requirement of low resistance and low leakage currents. The use of a silicide (forming Schottky contacts at the source and drain) instead of the conventional ion implanted Si for the contacts allows a reduction in the contact area to be made, due to lower serial resistance per unit area of the silicide. According to the specific contact resistance dependence on the Schottky barrier height (ΦSB) and active dopant concentration (ND),

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Front end of line considerations for progression beyond the 100 nm node ultrashallow junction requirements

Abstract: Effect of nitride sidewall spacer process on boron dose loss in ultrashallow junction formation

Cited by 6 publications

References 25 publications

Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates

Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates

Mechanisms and application of the Excimer laser doping from spin-on glass sources for USJ fabrication

Characterization of the Source/Drain Region in Mos Devices by Scanning Transmission Electron Microscopy

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