To achieve significant reduction in the design time of DSP algorithm specific ICs, automatic hardware realization from a high level algorithmic description of the system is desiied In order to accomplish this with an optimum use of hardware resources, the target architecture must be well defined.This paper describes a design methodology that supports the automation of the design of DSP systems; aftcr a d e e ptidn of the &sign system its usage in the design of a number of DSP systems will be discussed.