Frequency-Adaptive Stationary-Reference-Frame Grid Voltage Sequence Detector for Distributed Generation Systems

Robles, Eider; Pou, Josep; Ceballos, Salvador; Zaragoza, Jordi; Martin, J.L.; Ibáñez, P.

doi:10.1109/tie.2010.2098352

Cited by 58 publications

(34 citation statements)

References 35 publications

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“…With synchronous sampling, MAF will completely block the harmonic components and output only the dc. Thus, MAF-based PLLs [21]- [24] are frequency sensitive, and hence harmonic rejection capability suffers under frequency drift. The schemes proposed in [21] and [22] place the MAF inside the loop.…”

Section: Review Of Filtering Schemesmentioning

confidence: 99%

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Rapid Tracking of Grid Variables Using Prefiltered Synchronous Reference Frame PLL

Chandrasekaran

Ragavan

2015

IEEE Trans. Instrum. Meas.

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For synchronization applications, synchronous reference frame (SRF) phase-locked loop (PLL) is widely deployed. Its performance is excellent when the input voltage consists of only fundamental positive sequence (FPS) component. If the grid voltage is unbalanced or polluted with harmonics and dc offset, its performance degrades. Many modifications were proposed to address this issue. However, the removal of dc offset and fundamental negative sequence (FNS) component without compromising the dynamic performance still remains a challenging task. To this end, this paper presents a rapid Type-1 SRF PLL scheme with preloop filtering stage for tracking the attributes of grid voltage FPS component. Fixed sampling period sliding discrete Fourier transform (SDFT) and instantaneous symmetrical components method are employed in the preloop stage. With this modification, the dc offset, harmonics and the FNS component are rejected and only the FPS component enters the PLL. As a result, transients vanish quickly. However, when the grid frequency drifts, SDFT causes amplitude and phase errors, and Type-1 PLL introduces a steady-state tracking error in phase. These errors are compensated with the help of an error correction criteria. Robustness and the improved transient response of the proposed scheme are demonstrated with an experimental study involving real-time controller board (dSPACE DS1104) and three-phase programmable power source.

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Section: Review Of Filtering Schemesmentioning

confidence: 99%

“…Since MAF involves a delay of one fundamental period, placing it inside the PLL will lead to slow response. To alleviate the problem, MAF is placed outside the PLL in [23] and [24]. Further, it is made to be frequency-adaptive by incorporating a frequency detector based on zero crossing method.…”

Section: Review Of Filtering Schemesmentioning

confidence: 99%

Rapid Tracking of Grid Variables Using Prefiltered Synchronous Reference Frame PLL

Chandrasekaran

Ragavan

2015

IEEE Trans. Instrum. Meas.

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“…The moving average filter-based (MAF) pre-filtering PLL has precise accuracy under unbalanced and heavily polluted conditions when the filtering window width is integer times of the input AC signal's period [21]. The filtering window width in [22,23] is set to one time of the input AC signal's period in dq axis, which can eliminate DC offsets of input signal. But this will give one period delay and increase the response time.…”

Section: Introductionmentioning

confidence: 99%

An Efficient Phase-Locked Loop for Distorted Three-Phase Systems

Cao

et al. 2017

Energies

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This paper proposed an efficient phase-locked loop (PLL) that features zero steady-state error of phase and frequency under voltage sag, phase jump, harmonics, DC offsets and step-and ramp-changed frequency. The PLL includes the sliding Goertzel discrete Fourier transform (SGDFT) filter-based fundamental positive sequence component separator (FPSCS), the synchronous-reference-frame PLL (SRF-PLL) and the secondary control path (SCP). In order to obtain an accurate fundamental positive sequence component, SGDFT filter is introduced as it features better filtering ability at the frequencies that are integer times of fundamental frequency. Meanwhile, the second order Lagrange-interpolation method is employed to approximate the actual sampling number including both integer and fractional parts as grid frequency may deviate from the rated value. Moreover, an improved SCP with single-step comparison filtering algorithm is employed as it updates reference angular frequency according to the FPSC, which promises a zero steady-state error of phase and improves the frequency tracking speed. In this paper, the mathematical model of the proposed PLL is constructed, its stability is analyzed. Also, design procedure of the control parameters is presented. The effectiveness of the proposed PLL is confirmed by experimental results and comparison with advanced pre-filtering PLLs.

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“…A variety of open-loop synchronization techniques can be found in literature. The methods based on using the extended Kalman filters (EKFs) [3], [4], the space vector filters (SVFs) [3], the weighted least-square estimation (WLSE) algorithms [5], [6], the cascaded delayed signal cancellation (CDSC) [7], and the moving average filters (MAFs) [8] are among the existing open-loop synchronization techniques.…”

mentioning

confidence: 99%

“…They typically yield a satisfactory performance in terms of the phase/frequency detection accuracy when the grid frequency is at, or close to, its nominal value; however, their performance tends to worsen when the input frequency deviates from its nominal value. To overcome this problem, incorporating frequency estimation/control algorithms into the open-loop schemes have been proposed in [3]- [5], and [8]. However, this measure is usually at the cost of increasing the implementation complexity.…”

mentioning

confidence: 99%

Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines

Golestan

Ramezani

Guerrero

et al. 2014

IEEE Trans. Power Electron.

478

363

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The phase locked-loops (PLLs) are probably the most widely used synchronization technique in grid-connected applications. The main challenge associated with the PLLs is how to precisely and fast estimate the phase and frequency when the grid voltage is unbalanced and/or distorted. To overcome this challenge, incorporating moving average filter(s) (MAF) into the PLL structure has been proposed in some recent literature. A MAF is a linear-phase finite impulse response filter which can act as an ideal low-pass filter, if certain conditions hold. The main aim of this paper is to present the control design guidelines for a typical MAF-based PLL. The paper starts with the general description of MAFs. The main challenge associated with using the MAFs is then explained, and its possible solutions are discussed. The paper then proceeds with a brief overview of the different MAF-based PLLs. In each case, the PLL block diagram description is shown, the advantages and limitations are briefly discussed, and the tuning approach (if available) is evaluated. The paper then presents two systematic methods to design the control parameters of a typical MAF-based PLL: one for the case of using a proportional-integral (PI) type loopfilter (LF) in the PLL, and the other for the case of using a proportional-integral-derivative (PID) type LF. Finally, the paper compares the performance of a well-tuned MAF-based PLL when using the PI-type LF with the results of using the PID-type LF, which provides useful insights into their capabilities and limitations.

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Frequency-Adaptive Stationary-Reference-Frame Grid Voltage Sequence Detector for Distributed Generation Systems

Cited by 58 publications

References 35 publications

Rapid Tracking of Grid Variables Using Prefiltered Synchronous Reference Frame PLL

Rapid Tracking of Grid Variables Using Prefiltered Synchronous Reference Frame PLL

An Efficient Phase-Locked Loop for Distorted Three-Phase Systems

Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines

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