An Efficient Phase-Locked Loop for Distorted Three-Phase Systems

Abstract

This paper proposed an efficient phase-locked loop (PLL) that features zero steady-state error of phase and frequency under voltage sag, phase jump, harmonics, DC offsets and step-and ramp-changed frequency. The PLL includes the sliding Goertzel discrete Fourier transform (SGDFT) filter-based fundamental positive sequence component separator (FPSCS), the synchronous-reference-frame PLL (SRF-PLL) and the secondary control path (SCP). In order to obtain an accurate fundamental positive sequence component, SGDFT filter is introduced as it features better filtering ability at the frequencies that are integer times of fundamental frequency. Meanwhile, the second order Lagrange-interpolation method is employed to approximate the actual sampling number including both integer and fractional parts as grid frequency may deviate from the rated value. Moreover, an improved SCP with single-step comparison filtering algorithm is employed as it updates reference angular frequency according to the FPSC, which promises a zero steady-state error of phase and improves the frequency tracking speed. In this paper, the mathematical model of the proposed PLL is constructed, its stability is analyzed. Also, design procedure of the control parameters is presented. The effectiveness of the proposed PLL is confirmed by experimental results and comparison with advanced pre-filtering PLLs.

A Modified SOGI-PLL with Adjustable Refiltering for Improved Stability and Reduced Response Time

“…However, with low bandwidth, the transient response becomes slow [15,[22][23][24]. The main challenge associated with PLLs is to achieve a fast dynamic response without compromising the harmonic rejection capability while ensuring that disturbances in the electrical network do not drive the PLL to instability and the loss of synchronism [24][25][26][27]. The filter bandwidth should be a trade-off between filtering performance, time response, and stability [2,9,22].…”

Hedge-Algebra-Based Phase-Locked Loop for Distorted Utility Conditions

“…This prefiltering stage significantly attenuates disturbance components before the phase loop input. Some of the PLLs with the prefiltering stage are the PLL with a multiple complex-coefficient filter [10], the PLL with the recursive discrete Fourier transform [11], the PLL with the sliding Goertzel discrete Fourier transform [12], the PLL with the moving average filter-based (MAF) prefiltering [13], the PLL with the dual second-order generalized integrators [14], and the delay signal cancelation-based PLL [5,15].…”

A PLL-Based Online Estimation of Induction Motor Consumption Without Electrical Measurement

“…This type of system uses an Orthogonal Signal Generator (OSG) to generate two-phase orthogonal signals applied to a Park transformation to obtain high accuracy on the phase error. In [10,11], authors present various PLLs based on the OSG. Detailed comparisons were made from the following PLG-GSOs: Delay-PLL, Der-PLL, Park-PLL, SOGI-PLL, DOEC-PLL, VTD-PLL, CCF-PLL and TPFA-PLL algorithms to obtain vision of their advantages and disadvantages.…”