2010 First Workshop on Hardware and Software Implementation and Control of Distributed MEMS 2010
DOI: 10.1109/dmems.2010.21
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FPGA-in-the-Loop for Control Emulation of Distributed MEMS Simulation Using VHDL-AMS

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Cited by 6 publications
(4 citation statements)
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“…Finally other FPGAs applications in this list includes Hardware-In-the-Loop (HIL) [34,1115,[1276][1277][1278][1279][1280][1281][1282], GPS (Global Positioning System) [1283][1284][1285][1286][1287][1288][1289][1290][1291][1292][1293][1294][1295][1296][1297][1298], Positron Emission Tomography (PET) , bioinformatics [1325][1326][1327][1328][1329][1330][1331][1332][1333][1334][1335][1336][1337][1338][1339][1340][1341][1342], fuzzy logic [1343][1344][1345][1346][1347]…”
Section: Other Applicationsmentioning
confidence: 99%
“…Finally other FPGAs applications in this list includes Hardware-In-the-Loop (HIL) [34,1115,[1276][1277][1278][1279][1280][1281][1282], GPS (Global Positioning System) [1283][1284][1285][1286][1287][1288][1289][1290][1291][1292][1293][1294][1295][1296][1297][1298], Positron Emission Tomography (PET) , bioinformatics [1325][1326][1327][1328][1329][1330][1331][1332][1333][1334][1335][1336][1337][1338][1339][1340][1341][1342], fuzzy logic [1343][1344][1345][1346][1347]…”
Section: Other Applicationsmentioning
confidence: 99%
“…d) Modeling: Two complementary models of the Smart Surface have been proposed. The VHDL-AMS model [34] can simulate the behavior of the surface at a physical level while the SysML model [35] gives a more higher-level description of the architecture. The SysML model is derived from the VHDL-AMS one and the objective is to link the SysML description of the hardware to the UML description of the software.…”
Section: A Presentationmentioning
confidence: 99%
“…Modeling and simulation have proven to be efficient to solve design issues [10] but new solutions have to be found to increase MEMS robustness.…”
Section: Designing Robust Memsmentioning
confidence: 99%
“…The VHDL-AMS model [10] that have been developed inside the Smart Surface project can simulate the behavior of the surface while the SysML model [16] gives a more higher-level description of the architecture. The SysML model is derived from the VHDL-AMS one and the objective is to link the SysML description of the hardware to the UML description of the software.…”
Section: Modelingmentioning
confidence: 99%