FPGA implementation of an MLSE equalizer in 10Gb/s optical links

Stamoulias, Ioannis; Georgoulakis, Kristina; Blionas, S.; Glentis, George-Othon

doi:10.1109/icdsp.2015.7251985

Cited by 7 publications

(2 citation statements)

References 27 publications

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“…In addition, compared with the existing fastest x86-CPU work [5], which runs a 64-state VA decoder on the Intel Core 2 Extreme X9650 (4 cores, 3.0GHz) at the speed of 60Mbps, our results show significant throughput advantages. Compared with the newest results on FPGA platforms, e.g., 865Mbps for a 64-state VA decoder on Stratix III 340 (216MHz) [15] and 10Gbs for a 32-state VA decoder on Xilinx Virtex 7 XC7VX690T-2 [16], our results reach a comparable speed, and the good scalability and compatibility make it easy to transplant our decoder onto future powerful GPU devices to achieve higher performance.…”

Section: Resultsmentioning

confidence: 57%

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A Gb/s parallel block-based Viterbi decoder for convolutional codes on GPU

Peng

Liu

Hou

et al. 2016

2016 8th International Conference on Wireless Communications &Amp; Signal Processing (WCSP)

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In this paper, we propose a parallel block-based Viterbi decoder (PBVD) on the graphic processing unit (GPU) platform for the decoding of convolutional codes. The decoding procedure is simplified and parallelized, and the characteristic of the trellis is exploited to reduce the metric computation. Based on the compute unified device architecture (CUDA), two kernels with different parallelism are designed to map two decoding phases. Moreover, the optimal design of data structures for several kinds of intermediate information are presented, to improve the efficiency of internal memory transactions. Experimental results demonstrate that the proposed decoder achieves high throughput of 598Mbps on NVIDIA GTX580 and 1802Mbps on GTX980 for the 64-state convolutional code, which are 1.5 times speedup compared to the existing fastest works on GPUs.

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Section: Resultsmentioning

confidence: 57%

“…Load input symbol and calculate four branch metrics; 5: for all j ∈ Group(w) do end for 14: end for Kernel 2: Backward procedure 15: for thread block b = 0 to N bl /N c − 1, warp w = 0 to N c − 1 and thread t = 0 to 31 parallel do 16:…”

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confidence: 99%