A Gb/s parallel block-based Viterbi decoder for convolutional codes on GPU

Peng, Hao; Liu, Rongke; Hou, Yi; Zhao, Ling

doi:10.1109/wcsp.2016.7752638

Cited by 13 publications

(10 citation statements)

References 16 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In [10], in addition to the tiling scheme and coalescing accesses of survivor paths, branch metrics are efficiently computed according to specific repetitive patterns which help to share computations. In addition, data transfers between CPU and GPU are optimized, in specific, by employing multiple CUDA streams, and by compacting every four input llr values as a 32-bit value, and every 32 output decoded bits as a 32-bit value.…”

Section: Previous Gpu-accelerated Viterbi Decoder Methodsmentioning

confidence: 99%

High-Throughput Parallel Viterbi Decoder on GPU Tensor Cores

Mohammadidoost,

Hashemi

2020

Preprint

View full text Add to dashboard Cite

Many research works have been performed on implementation of Vitrerbi decoding algorithm on GPU instead of FPGA because this platform provides considerable flexibility in addition to great performance. Recently, the recently-introduced Tensor cores in modern GPU architectures provide incredible computing capability. This paper proposes a novel parallel implementation of Viterbi decoding algorithm based on Tensor cores in modern GPU architectures. The proposed parallel algorithm is optimized to efficiently utilize the computing power of Tensor cores. Experiments show considerable throughput improvements in comparison with previous works.

show abstract

Section: Previous Gpu-accelerated Viterbi Decoder Methodsmentioning

confidence: 99%

High-Throughput Parallel Viterbi Decoder on GPU Tensor Cores

Mohammadidoost,

Hashemi

2020

Preprint

View full text Add to dashboard Cite

show abstract

Section: Previous Gpu-accelerated Viterbi Decoder Methodsmentioning

confidence: 99%

High-Throughput and Memory-Efficient Parallel Viterbi Decoder for Convolutional Codes on GPU

Mohammadidoost,

Hashemi

2020

Preprint

View full text Add to dashboard Cite

This paper describes a parallel implementation of Viterbi decoding algorithm. Viterbi decoder is widely used in many state-of-the-art wireless systems. The proposed solution optimizes both throughput and memory usage by applying optimizations such as unified kernel implementation and parallel traceback. Experimental evaluations show that the proposed solution achieves higher throughput compared to previous GPUaccelerated solutions.

show abstract

“…1) applies the signal at the antenna to a pass-band filter, a low-noise amplifier (LNA), minimizing the noise's statistical power. Next, a coherent demodulation section using a multi-phase voltage-controlled oscillator (MP-VCO) removes the cosine in (1). The MP-VCO [21] mathematical behavior is:…”

Section: How the Recovery Loop Workmentioning

confidence: 99%

“…The hard Viterbi, in an additive white Gaussian noise (AWGN) channel model and no inter-symbolic interference (ISI), decodes convolutional coded symbols with a digital circuit made of a simple add-compare-select (ACS) and trace-back units. The survivors-path and the related output symbols, with a decision depth sufficient to the survivors' convergence in a unique state, [1] require two arrays as storage: typically a random access memory (RAM). The classic Viterbi decoder stores the state and branch metrics in additional RAMs.…”

Section: Introductionmentioning

confidence: 99%

Upgrading an analog recovery loop for optimized decoding jointly to an increased data rate

Visalli¹

2021

Telecommun Syst

View full text Add to dashboard Cite

The maximum likelihood detection theory improves the error rate of a sub-optimal but cheaper, coded symbol recovery loop using oversampling proposed as an alternate solution for the decoding problem without the log-likelihood ratio computation. The former implementation delivers the output data in one-symbol delay, and the required transistor count makes this approach attractive for ultra-low-energy wireless applications. The proposed hardware upgrade includes an analog to digital converter and fixed-point accumulation logic to compute the soft values, replacing a trigger used as a hard detector. This work investigates the soft decoding in the presence of binary and non-binary source symbols. Simulation results show that the soft approach improves the signal-to-noise ratio by 3dB and 2.5 dB when the encoding rates are 1/3 and 2/3.

show abstract

A Gb/s parallel block-based Viterbi decoder for convolutional codes on GPU

Cited by 13 publications

References 16 publications

High-Throughput Parallel Viterbi Decoder on GPU Tensor Cores

High-Throughput Parallel Viterbi Decoder on GPU Tensor Cores

High-Throughput and Memory-Efficient Parallel Viterbi Decoder for Convolutional Codes on GPU

Upgrading an analog recovery loop for optimized decoding jointly to an increased data rate

Contact Info

Product

Resources

About