FPGA-based synthetic instrumentation for board test

Aleksejev, Igor; Jutman, Artur; Devadze, Sergei; Odintsov, Sergei; Wenzel, Thomas

doi:10.1109/test.2012.6401571

Cited by 18 publications

(4 citation statements)

References 12 publications

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“…In order to monitor this flow of data during the test execution, a custom IP was proposed, which is configured as a peripheral connected to the TPIU and mapped on an FPGA, which is supposed to exist on the board. Hence, following here the general idea already introduced in other papers (e.g., [2]), FPGAs possibly existing on the board for functional purposes can also be used for test purposes. It is important to underline that the proposed approach does not require any additional FPGA resources, since those used for test purpose are then also used for functional purposes when the test is finished.…”

Section: Monitoring Ipmentioning

confidence: 99%

Fault tolerant electronic system design

Sterpone

2017

2017 IEEE International Test Conference (ITC)

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Section: Monitoring Ipmentioning

confidence: 99%

Fault tolerant electronic system design

Sterpone

2017

2017 IEEE International Test Conference (ITC)

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“…This technique was first published several years ago [1], and the technology has continued to be developed upon for each new product. Others in industry are working on having FPGAs improve test times, including enhancements to standard boundary scan methodologies [2] [3].…”

Section: Previous Workmentioning

confidence: 99%

FPGA-based universal embedded digital instrument

Ferry

2013

2013 IEEE International Test Conference (ITC)

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In order to test products, a multi-purpose digital instrument has been developed which can be completely embedded within on-board FPGAs. This instrument incorporates numerous features such as specialized triggering, fault capture, and pattern edge placement. To increase usability, pattern generation and protocol-aware features are included within its small footprint. The applications of the embedded instrument can include design verification, production test, and fault diagnostics in a simple and low resource implementation.

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“…There are different companies like Teseda [3], which try to lower the ATE cost [4]. Recently, due to the improvements at the FPGA technology, ATE based on FPGAs are popular in the literature [5,6,7]. They either can only handle functional tests or require reconfigurability to be adapted to different test circuits.…”

Section: Introductionmentioning

confidence: 99%

FPGA Based Low Cost Automatic Test Equipment for Digital Circuits

Bayrakci¹

2019

Electrica

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Testing of digital circuits is a crucial problem. There are two types of Automatic Test Equipment (ATE): Very precise but complex and expensive test equipments called high-end ATE and their approximate but cheap alternatives called low-end ATE. In this paper we propose a very cheap, FPGA based embedded low-cost ATE (ELATE) that is capable of functional, speed/delay and power consumption tests. It is composed of FPGA hardware with six FSM modules written in Verilog and a computer software (user interface) communicating with the FPGA through UART. It can handle different I/O combinations and can detect delay with 4ns precision. It can both visually show the resultant voltage/current-time graphs and store them as text files. The ATE is tested on different Design Under Test (DUT) devices like 8-bit and 12-bit adders and a square root circuit implemented on FPGA.

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FPGA-based synthetic instrumentation for board test

Cited by 18 publications

References 12 publications

Fault tolerant electronic system design

Fault tolerant electronic system design

FPGA-based universal embedded digital instrument

FPGA Based Low Cost Automatic Test Equipment for Digital Circuits

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