FPGA based real-time image segmentation for medical systems and data processing

Dillinger, Peter C.; Vogelbruch, J.; Leinen, Jessica; Suslov, S.; Patzak, R.; Winkler, Hanspeter; Schwan, Karsten

doi:10.1109/rtc.2005.1547401

Cited by 17 publications

(11 citation statements)

References 16 publications

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“…This approach is widely used in the literature [7], especially on algorithms characterized by simple dependencies. However, this approach cannot be considered a viable solution when dealing with algorithms characterized by complex dependencies, since it does not take into consideration their dependency schema, thus leading to unacceptable overheads in terms of both computation time and memory requirements.…”

Section: Implementation Approachesmentioning

confidence: 99%

Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms

et al. 2013

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Abstract-Traditionally, parallel implementations of multimedia algorithms are carried out manually, since the automation of this task is very difficult due to the complex dependencies that generally exist between different elements of the data set. Moreover, there is a wide family of iterative multimedia algorithms that cannot be executed with satisfactory performance on Multi-Processor Systems-on-Chip or Graphics Processing Units. For this reason, new methods to design custom hardware circuits that exploit the intrinsic parallelism of multimedia algorithms are needed.As a consequence, in this paper, we propose a novel design method for the definition of hardware systems optimized for a particular class of multimedia iterative algorithms. We have successfully applied the proposed approach to several realworld case studies, such as iterative convolution filters and the Chambolle algorithm, and the proposed design method has been able to automatically implement, for each one of them, a parallel architecture able to meet real-time performance (up to 72 frames per second for the Chambolle algorithm), with on-chip memory requirements from 2 to 3 orders of magnitude smaller than the state-of-the art approaches.

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Section: Implementation Approachesmentioning

confidence: 99%

Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms

et al. 2013

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“…From this, the edge gradient and direction can be determined: 2 2 Gy Gx G (14) ) 135 , 90 , 45 , 0 ( ); arctan( Gx Gy (15) 3. Non-maximum suppression: Once the edge gradient and direction are obtained, a search is carried out to determine whether the gradient magnitude assumes a local maximum in the gradient direction.…”

Section: Finding the Intensity Gradient Of The Imagementioning

confidence: 99%

“…The watershed transform is a region-based segmentation approach coming from the field of mathematical morphology. It is used in several applications like object-based motion estimation [17], medical imaging [15], multi spectral satellite imagery [18], computer vision, etc. A flexible and fast algorithm for computing watersheds in digital grey scale images was described by Luc Vincent and Pierre Soille [11].It is applied on an image gradient which is obtained by applying an appropriate morphological gradient operator on a grey scale image.…”

Section: Introductionmentioning

confidence: 99%

Improving Watershed Algorithm with a Histogram Driven Methodology and Implementation of the System on a Virtex 5 Platform

Zghal¹,

Masmoudi²

2010

IJCA

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Watershed algorithm as was introduced by Vincent and Soille is a segmentation algorithm based on the inundation process of the image gradient which is observed as a relief. It aims at finding the peaks in the image gradient called watersheds and identifying them as the image contours. Due to its flexibility and rapidity, this algorithm is used in several applications. However, its main drawback is the over segmentation .In this paper, we improve this technique by introducing a histogram driven methodology. The developed architecture is applied on an empirical basis for research on image segmentation and boundary detection in order to be compared with other segmentation algorithms. The simulation results show that the performance of our algorithm is superior to the other segmentation techniques. Finally, the whole design is implemented on a Virtex 5 platform based on a codesign methodology leading to 147 MHz frequency and 76% of hardware resource occupation for an image of the size of 128*128.

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“…K.Mueller et al [9] did fast and accurate three-dimensional reconstruction from cone-beam projection data using algebraic methods in his PhD dissertation. P.V.Dillinger [10] et al propose a parallelizable 3D grey-value structure code for image segmentation on FPGA which can process segmentation in real time. K.J.Shanthi et al [11] used histogram for image segmentation and implement this algorithm on FPGA which renders the algorithm more useful for real time application.…”

Section: Introductionmentioning

confidence: 99%