FPGA based high precision torque and flux estimator of direct torque control drives

Sutikno, Tole; Idris, Nik Rumzi Nik; Jidin, Auzani; Daud, Mohd Fadzil

doi:10.1109/iapec.2011.5779871

Cited by 13 publications

(8 citation statements)

References 22 publications

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“…These equations can be discretized using different numerical methods but the simplest method to be used is explicit Euler [30]. While this method presents several disadvantages such as greater local and global error and risk of instability, these problems are negligible whenever very small integration steps (below microseconds) are used, so it is frequently used for HIL systems in power electronics [13,[31][32][33]. Therefore, the previous Equations (1) and (2) can be discretized and the state variables can be defined as:…”

Section: Application Examplementioning

confidence: 99%

Exploring the Limits of Floating-Point Resolution for Hardware-In-the-Loop Implemented with FPGAs

2018

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As the performance of digital devices is improving, Hardware-In-the-Loop (HIL) techniques are being increasingly used. HIL systems are frequently implemented using FPGAs (Field Programmable Gate Array) as they allow faster calculations and therefore smaller simulation steps. As the simulation step is reduced, the incremental values for the state variables are reduced proportionally, increasing the difference between the current value of the state variable and its increments. This difference can lead to numerical resolution issues when both magnitudes cannot be stored simultaneously in the state variable. FPGA-based HIL systems generally use 32-bit floating-point due to hardware and timing restrictions but they may suffer from these resolution problems. This paper explores the limits of 32-bit floating-point arithmetics in the context of hardware-in-the-loop systems, and how a larger format can be used to avoid resolution problems. The consequences in terms of hardware resources and running frequency are also explored. Although the conclusions reached in this work can be applied to any digital device, they can be directly used in the field of FPGAs, where the designer can easily use custom floating-point arithmetics.

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Section: Application Examplementioning

confidence: 99%

Exploring the Limits of Floating-Point Resolution for Hardware-In-the-Loop Implemented with FPGAs

2018

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“…In [12][13][14] an FPGA based DTC implementation was developed. An FPGA based torque and flux estimator for DTC control was implemented in [15]. In [16,17] an FPGA Hardware Co-Simulation process for induction motor control was presented.…”

Section: Introductionmentioning

confidence: 99%

FPGA Hardware in the Loop Validation of Torque and Flux Estimators for Direct Torque Control (DTC) of an Induction Motor (IM)

Aib¹

2021

IJIES

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This article provides a hardware implementation of torque and flux estimators for direct torque control (DTC) of an induction motor (IM) on the Field Programmable Gate Array (FPGA). Due to its high processing frequency, the FPGA circuit presents an alternative strategy for achieving a high performance DTC implementation. This cannot be achieved by Digital Signal Processing (DSP) or Microcontroller application. Optimized hardware architecture is also proposed for implementation of a complete estimator with explicit determination of all the quantities such as the flux phase, the flux amplitude and the torque amplitude. This work presents a precise hardware estimator of the torque and the flux, it developed with negligible estimation error (0.0002 [Wb] RMS estimate error for the stator flux and 0.0005 [Nm] RMS estimate error the torque), in addition to that this estimator is implemented on the Virtex-4 FPGA board with minimal resources(less 5% of slices registers, 5% of DSP48Es and around 17% of LUTS). This estimator is developed and synthesized independently of the command and can be reused for any task which requires the estimation of these quantities. After this the estimator was used to complete a DTC control in a hardware co-simulation procedure with the Xilinx system generator and MATLAB/SIMULINK tools on the Xilinx ML402 development kit.

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“…But these devices have a limited processing speed because of serial calculations; this affects its performance especially in real time application. The use of FPGA circuits offers an appropriate solution for fast calculations [9][10][11][12][13][14].…”

Section: Introductionmentioning

confidence: 99%

FPGA Hardware in the Loop Validation of Asynchronous Machine with Full Direct Torque Control Implementation

Aib¹,

Khodja²,

Chakroune³

et al. 2021

AMA_B

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This article provides a full hardware implementation for direct torque control (DTC) of an asynchronous motor (AM) on the Field Programmable Gate Array (FPGA). Due to its high processing frequency, the FPGA circuit presents an alternative for achieving a high performance DTC implementation. This cannot be achieved by any DSP or microcontroller application. The proposed hardware architecture implements three components of DTC control strategy (the integral proportional speed regulator, the estimation and the switching blocks). This implementation has the advantage of being faster, more efficient and with minimum hardware resources on the target FPGA board. The hardware architecture of the DTC control was designed and simulated in Matlab / Simulink using XSG blocks, then synthesized with the Xilinx ISE 14.2 tool, implemented and validated on the Xilinx Virtex-4 FPGA circuit by Hardware in the Loop process.

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FPGA based high precision torque and flux estimator of direct torque control drives

Cited by 13 publications

References 22 publications

Exploring the Limits of Floating-Point Resolution for Hardware-In-the-Loop Implemented with FPGAs

Exploring the Limits of Floating-Point Resolution for Hardware-In-the-Loop Implemented with FPGAs

FPGA Hardware in the Loop Validation of Torque and Flux Estimators for Direct Torque Control (DTC) of an Induction Motor (IM)

FPGA Hardware in the Loop Validation of Asynchronous Machine with Full Direct Torque Control Implementation

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