FPGA based distributed self healing architecture for reusable systems

Akoglu, Ali; Sreeramareddy, Adarsha; Josiah, Jeff G.

doi:10.1007/s10586-009-0082-2

Cited by 9 publications

(3 citation statements)

References 26 publications

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“…Distributed control was also used for multi-FPGA systems, which have started to gain interest and have been investigated in several works. However, only one controller was used per FPGA [6] [7], which implies a high design complexity of controllers, and no formalism was proposed to model the control system.…”

Section: Related Workmentioning

confidence: 99%

Semi-distributed Control for FPGA-based Reconfigurable Systems

Trabelsi

Meftali

Dekeyser

2012

2012 15th Euromicro Conference on Digital System Design

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Due to the growing complexity of the applications targeted by FPGA-based reconfigurable systems, the control design of such systems is becoming one of the main hurdles faced by designers. In this paper, we propose a semi-distributed control model based on the separation between different control concerns (monitoring, decision-making and reconfiguration) and on formalism-oriented design in order to decrease the design complexity of the control, and facilitate design verification, reuse and scalability. This model is composed of distributed controllers handling each the self-adaptivity of a reconfigurable region of the system, and a coordinator that coordinates their reconfiguration decisions in order to respect global system constraints. Implementations on FPGA showed that our semi-distributed control model is more flexible, reusable and scalable than the centralized one, at the cost of a slight increase in required hardware resources.

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Section: Related Workmentioning

confidence: 99%

Semi-distributed Control for FPGA-based Reconfigurable Systems

Trabelsi

Meftali

Dekeyser

2012

2012 15th Euromicro Conference on Digital System Design

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“…In contrast to the conventional static development approach, PR designs obtain the flexibility to dynamically manage on-chip resources. According to many research results, we may conclude the merits of adaptively reconfigurable designs in the aspects of reduced hardware cost, efficient resource utilization, low power dissipation, as well as other advanced features such as self-evolving or self-healing (Akoglu et al, 2009) capabilities. In this field, some issues remain still open and deserve further in-depth investigations.…”

Section: Conclusion and Open Issuesmentioning

confidence: 99%

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

Liu

Kuehn

et al. 2012

International Journal of Embedded and Real-Time Communication Systems

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FPGA Dynamic Partial Reconfiguration (DPR or PR) technology has emerged and become gradually mature in the recent years. It provides the Time-Division Multiplexing (TDM) capability in utilizing on-chip resources and leads to significant benefits in comparison with conventional static designs. However, the partially reconfigurable design process features additional complexity and technical requirements to the FPGA developers. Hence, PR design approaches are being widely explored and investigated to systematize the development methodology and ease the designers. In this paper, the authors collect several research and engineering projects in this area and present a survey of the design methodology and applications of PR. Research aspects are discussed in various hardware/software layers.

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“…Arrival of FPGAs into the electronic industry has revolutionized VLSI based digital systems [1]. FPGAs have now become one of the most commonly used IC in majority of the VLSI based high computing mission critical applications.…”

Section: Introductionmentioning

confidence: 99%

Placement Strategies for Faulty Cells in Module Relocation Based BISR Approach

Eapen¹,

Pradeep²,

Varghese³

et al. 2015

Advances in Intelligent Systems and Computing

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Field programmable gate arrays are used as a core component in many safety and mission critical applications. In most cases these systems will be continuously exposed to radiations and change in temperature and pressure. This can result in defects within the IC which leads to malfunctioning or total system failure before mission completion. Traditionally, fault tolerance in FPGA is achieved by using spare cells to replace a faulty cell. Higher fault coverage demands more number of spares. So there is a need to develop a repair strategy with minimal hardware overhead capable to respond to defects without bothering system performance. The paper discusses a Built-in-Self-Repair (BISR) approach for FPGA based reconfigurable systems with limited number of spares, reduced area overhead, routing complexity and maximum resource utilization. The key concept used in this BISR is relocation of reconfigurable modules using dynamic runtime partial reconfiguration. This is an on-line repair method which can be used to handle multiple faults without affecting system functioning and throughput. The efficient placement of relocated module helps handle more number of faults with least area overhead and routing complexity. According to the required lifetime of the system the designer can flexibly use this method to maintain fault coverage until mission completion.

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FPGA based distributed self healing architecture for reusable systems

Cited by 9 publications

References 26 publications

Semi-distributed Control for FPGA-based Reconfigurable Systems

Semi-distributed Control for FPGA-based Reconfigurable Systems

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

Placement Strategies for Faulty Cells in Module Relocation Based BISR Approach

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