As technology scales for increased circuit density and performance, the management of power consumption in system-on-chip (SoC) is becoming critical. Today, having the appropriate electronic system level (ESL) tools for power estimation in the design flow is mandatory. The main challenge for the design of such dedicated tools is to achieve a better tradeoff between accuracy and speed. This paper presents a consumption estimation approach allowing taking the consumption criterion into account early in the design flow during the system cosimulation. The originality of this approach is that it allows the power estimation for both white-box intellectual properties (IPs) using annotated power models and black-box IPs using standalone power estimators. In order to obtain accurate power estimates, our simulations were performed at the cycle-accurate bit-accurate (CABA) level, using SystemC. To make our approach fast and not tedious for users, the simulated architectures, including standalone power estimators, were generated automatically using a model driven engineering (MDE) approach. Both annotated power models and standalone power estimators can be used together to estimate the consumption of the same architecture, which makes them complementary. The simulation results showed that the power estimates given by both estimation techniques for a hardware component are very close, with a difference that does not exceed 0.3%. This proves that, even when the IP code is not accessible or not modifiable, our approach allows obtaining quite accurate power estimates that early in the design flow thanks to the automation offered by the MDE approach.

In this paper, we will prove the positive Harris recurrence of the CIR process. Ergodic results on transformations of the CIR process will be given. We will also show that if g : R + → R is continuous, f : R → R + is measurable and Xt is the CIR process, then 1 N N−1 j=0 f j+1 j g Xs ds converges almost surely to a constant. An application of the ergodic results in one credit migration model will be presented too.

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Abstract. In this paper we find the transition densities of the basic affine jump-diffusion (BAJD), which is introduced by Duffie and Gârleanu [D. Duffie and N. Gârleanu, Risk and valuation of collateralized debt obligations, Financial Analysts Journal 57 (1) (2001), pp. 41-59] as an extension of the CIR model with jumps. We prove the positive Harris recurrence and exponential ergodicity of the BAJD. Furthermore we prove that the unique invariant probability measure π of the BAJD is absolutely continuous with respect to the Lebesgue measure and we also derive a closed form formula for the density function of π.

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In this paper we study the jump-diffusion CIR process (shorted as JCIR), which is an extension of the classical CIR model. The jumps of the JCIR are introduced with the help of a pure-jump Lévy process (J t , t ≥ 0). Under some suitable conditions on the Lévy measure of (J t , t ≥ 0), we derive a lower bound for the transition densities of the JCIR process. We also find some sufficient conditions under which the function V (x) = x, x ≥ 0, is a Forster-Lyapunov function for the JCIR process. This allows us to prove that the JCIR process is exponentially ergodic.

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Abstract-Due to their exponential complexity, designing adaptation control for Reconfigurable Systems-on-Chip (RSoC) is becoming one of the most challenging tasks, resulting in longer design cycles and increased time-to-market. This paper addresses this issue and proposes a novel adaptation control design approach for FPGA-based reconfigurable systems aiming to increase design productivity. This approach combines control distribution and high-level modeling in order to decrease design complexity and enhance design reuse and scalability. Control distribution is based on allocating local control aspects (monitoring, decision and reconfiguration) to distributed controllers, while respecting global system constraints/objectives using a coordinator. High-level modeling makes use of Model-Driven Engineering and the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard in order to move from high level models to automatic code generation, which significantly simplifies the control design. The proposed design approach is integrated in a model-driven RSoC design flow and allows to model adaptation aspects at different design levels: application, architecture, allocation and deployment, which allows to target a wide range of control requirements. In order to validate our approach, a video processing application was implemented on a reconfigurable system that contained four distributed hardware controllers.