Four‐Bits‐Per‐Cell Operation in an HfO₂‐Based Resistive Switching Device

Abstract

The quadruple-level cell technology is demonstrated in an Au/Al O /HfO /TiN resistance switching memory device using the industry-standard incremental step pulse programming (ISPP) and error checking/correction (ECC) methods. With the highly optimistic properties of the tested device, such as self-compliance and gradual set-switching behaviors, the device shows 6σ reliability up to 16 states with a state current gap value of 400 nA for the total allowable programmed current range from 2 to 11 µA. It is demonstrated that the conventional ISPP/ECC can be applied to such resistance switching memory, which may greatly contribute to the commercialization of the device, especially competitively with NAND flash. A relatively minor improvement in the material and circuitry may enable even a five-bits-per-cell technology, which can hardly be imagined in NAND flash, whose state-of-the-art multiple-cell technology is only at three-level (eight states) to this day.

Recommended Methods to Study Resistive Switching Devices

“…The multilevel capability has been reported for a large plethora of RS devices, mainly thanks to the analog dependence of R LRS ( R HRS ) on the I SET ( I RESET ). Programming algorithms like incremental step pulse programming and closed‐loop pulse switching have allowed a better control of the multilevel operation in RS devices. However, in the vast majority of cases, the multilevel operation is reported either on single devices or for median resistance levels.…”

Flexible cation-based threshold selector for resistive switching memory integration

“…Development of flexible electronic, wearable and implantable devices stimulates the exploration of flexible nonvolatile memory [1][2][3][4]. With the flash memory approaching its physical limit, the emerging resistive switching random access memory (RRAM) is considered as one of the most promising candidates for the next-generation nonvolatile memory [5][6][7]. RRAM is competitive for its two-terminal structure, simple operation, fast speed and scalable potential for 3D high-density integration [8][9][10], meeting the compressive requirement of this big data.…”

Picosecond multilevel resistive switching in tantalum oxide thin films

“…The capability of multilevel operation, i. e. storing multiple bits per cell, enhances the storage density [21][22][23] . In that case, the programming process is stopped at a specific intermediate resistive state (IRS) and is controlled open 1 Institut für Werkstoffe der Elektrotechnik (IWE 2) and JARA -Fundamentals for Future Information Technology, RWTH Aachen University, 52056 Aachen, Germany.…”