Foundry capabilities for photonic integrated circuits

Towards the Integration of InP Photonics With Silicon Electronics: Design and Technology Challenges

“…Section II has presented connection schemes that were implemented in the EIC designs. The photonic wafer originates from the HHI generic InP foundry platform [16], [17], [69], which has been used to produce PICs for a wide range of applications ranging from optical transceivers [70] to circuits for optical signal processing [71]. We designed Tx and Rx building blocks on the photonic wafer in form of DFB lasers with EAMs and PIN photodiodes with spot-size converters (SSC), respectively.…”

Photonic Integrated Circuits for NGPON2 ONU Transceivers (Invited)

“…Silicon is among the most mature photonic integrated platforms, leveraging from existing technologies like silicon electronics and micro electro-mechanical systems (MEMS) industries and enabling foundry services robustness and product commercialization. InP platforms can be seen as one of the options that stem out from the alternatives since it integrates monolithically high-quality lasers, receivers, amplifiers, and passives [33,35,60]. Si and SiN are more prone to be used for passive and filtering components, with the need to recur to hybrid packaging [61] Furthermore, several reference institutions with state-of-the-art research in integrated photonics contributed to the technology developments, namely the University of California, Santa Barbara (UCSB) with the available California NanoSystems Institute (CNSI) Nanostructure Cleanroom Facility (NCF); the Kavli Nanoscience Institute (KNI) laboratory at the California Institute of Technology (Caltech), the Fraunhofer Heinrich-Hertz-Institut (HHI); the ePIXfab, INTEC department-Photonics Research Group at Ghent University; the Nanophotonics Technology Center (NTC) at the Universitat Politècnica de València (UPV); etc.…”

“…Currently, packaging is seen as one of the most significant bottlenecks in the development of commercially relevant PIC devices [60,84]. The packaging design flow is divided into three main areas: the optical design, the electrical design, and the thermal management of the module.…”

“…Its profile can be changed by the type of materials and doping used. PINs can be easily integrated into e.g., InP PIC, which is already available for bandwidths exceeding >35 GHz and operational wavelength ranges covering the common fiber telecommunication bands [33,60,85]. APDs are tougher to integrate, however, from the system point of view, they result in improved sensitivity due to their intrinsic avalanche gain.…”

Phase-Injected Topology Optimization for Scalable and Interferometrically Robust Photonic Integrated Circuits

“…7 Indeed, the apogee of photonic design lies in achieving integration densities that scale on par with integrated electronics, incorporating vast networks of thousands or even millions of photonic devices. Despite significant advances in commercial foundry processing, 8 however, two fundamental challenges continue to impede this effort: (1) fabrication variability (as well as environmental changes) often renders large interferometric systems inoperable without the use of dynamic tuners dispersed throughout the chip, 9 a costly compromise not amenable to scaling; (2) optimized integrated photonic devices are difficult to design due to the enormous number of degrees of freedom available to photonic designers, often requiring sophisticated "inversedesign" algorithms that, while effective, are typically limited by fundamental trade-offs between design dimensionality, device footprint, functional complexity, computational cost, and realizable performance. 10 To overcome these challenges, we present and experimentally validate a novel phase-injected topology optimization (TO) paradigm uniquely capable of designing interferometrically stable integrated photonic devices robust to various forms of manufacturing variability and operating conditions.…”