Formation of InGaAs fins by atomic layer epitaxy on InP sidewalls

Abstract

We describe a fabrication process which forms InGaAs fins with sub 10 nm thickness and 180 nm height. The process flow requires no semiconductor dry-etch, thereby avoiding surface damage arising from such processes. Instead, InGaAs fins are formed using nanometer controlled atomic layer epitaxial growth, using tertiarybutylarsine, upon InP sidewall which are eventually selectively etched. Such fins can serve as channels of field effect transistors, allowing excellent electrostatics and with potentially high operating current per fin.

Selective area epitaxy of III–V nanostructure arrays and networks: Growth, applications, and future directions

“…The large surface-to-volume ratio of nanowires, with wrap-or FinFET gates, provides a high on-to-off current ratio. SAE has precise controllability and allows growth at predefined positions without the aid of catalysts; thus, it is a natural path for fabricating wrap-gated FETs (for vertical wires 214 ) or FinFETs (for planar wires/nanosheets 17,215 ) on a large scale.…”