Fluctuations in Electronic Properties of MOS Interface in Nanoscale MOSFETs

Abstract

Fluctuations in the number, energy level, and carrier capture rate of Si/SiO 2 interface traps in small-gate-area metal-oxidesemiconductor field-effect transistors (MOSFETs) containing only a few interface traps have been directly observed. This observation is based on an understanding of charge pumping phenomena and a newly observed phenomenon of on(off)-time-dependent charge pumping characteristics in their rising (falling) portion. It is directly shown from experimental results that the fluctuation in the number of interface traps contained in an individual nanoscale MOSFET is fairly large, and that there are various interface traps with individual discrete energy levels and carrier capture rates. These fluctuations may have an impact on the variation in device performance of future digital metal-insulator-semiconductor (MIS) devices.

(Invited) Single Defect Characterization at Si/SiO 2 Interface

“…The charge pumping (CP) technique (1,2) is known to be the only highly-precise method for evaluating the density of interface traps even in extremely small-area MOSFETs, and many studies on the in-depth exploration of traps near the MOS interface have been reported using the CP method (3)(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17)(18)(19)(20)(21). This method will become a more powerful technique for investigating the interface traps in the future.…”

Charge pumping current from single Si/SiO2interface traps: Direct observation ofPbcenters and fundamental trap-counting by the charge pumping method

“…The charge pumping (CP) technique 2,3) is known to be the only highly-precise method for evaluating the density of interface traps even in extremely small-area MOSFETs, and many studies on the in-depth exploration of traps near the MOS interface have been reported using the CP method. [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20] This method will become a more powerful technique for investigating the interface traps in the future. In the CP method, a pulsed voltage is applied to the gate to alternately form inversion and accumulation layers under a constant reverse-biased source/drain-junction.…”