Fault detection of combinational circuits based on supply current

Hashizume, Masaki; Yamada, Kazuhito; Tamesada, Takeomi; Kawakami, M.

doi:10.1109/test.1988.207824

Cited by 36 publications

(17 citation statements)

References 3 publications

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“…IDDQ has been shown to be an effective diagnostic technique for CMOS bridging defects, but is not applicable to all types of CMOS defects [13], [14]. Several dynamic supply current IDD-based approaches have since been proposed [9], [15]- [18]. In general, these I DD -based methods are not hampered by the slow test application rates and are not as sensitive to design styles as I DDQ .…”

Section: Introductionmentioning

confidence: 99%

Time- and frequency-domain transient signal analysis for defect detection in CMOS digital ICs

Plusquellic

Chiarulli

Levitan

1999

IEEE Trans. Circuits Syst. I

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A novel approach to testing CMOS digital circuits is presented that is based on an analysis of voltage transients at multiple test points and I DD switching transients on the supply rails. We present results from hardware experiments that show distinguishable characteristics in the transient waveforms of defective and nondefective devices. These variations are shown to exist in both the time domain and frequency domain for CMOS open-drain and bridging defects, located both on and off sensitized paths.Index Terms-CMOS defects, digital device testing, frequency domain, parametric, transient response.

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Section: Introductionmentioning

confidence: 99%

Time- and frequency-domain transient signal analysis for defect detection in CMOS digital ICs

Plusquellic

Chiarulli

Levitan

1999

IEEE Trans. Circuits Syst. I

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“…From a practical point of view, it would be ideal to be able to detect faults at the board level. A method [2] that includes supply current is based on these ideas.…”

Section: Introductionmentioning

confidence: 99%

A study on fault detection for IC boards using thermography

Nishino

Ohshima

1998

Syst. Comp. Jpn.

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“…Supply current of a CMOS unfaulty gate does not depend on the output logic values, but supply current of a bipolar unfaulty gate depends on the output logic values [5]. Thus, we model the variation of quiescent supply current at the i-th gate in an unfaulty bipolar logic circuit as a Gaussian distribution N ( m i ( T j ) , o~i ( Tj)2) which is expressed by Eq.…”

Section: Modeling Of Unit-to-unit Variations In Gatesmentioning

confidence: 99%

“…In the past, we developed a fault detection method for bipolar circuits [5]. Also, we proposed two kinds of test generation algorithms for the supply current testing and derived the test input vectors of ISCAS-85 benchmark circuits, with which more faults can be detected than the logic testing [6,7].…”

Section: Introductionmentioning

confidence: 99%