FastForward for Efficient Pipeline Parallelism

Giacomoni,; Moseley,; Vachharajani,

doi:10.1109/pact.2007.4336235

Cited by 3 publications

(2 citation statements)

References 2 publications

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“…To minimize the communication cost, we use the latest cache-optimized lock-free message queue implementation [9]. This message queue is used to hand over the pseudorandom numbers generated from the first stage to the second stage, which calculates the checksum based on these pseudorandom numbers.…”

Section: Pipeline Parallelism Attackmentioning

confidence: 99%

A software-based root-of-trust primitive on multicore platforms

Yan

Han

et al. 2011

Proceedings of the 6th ACM Symposium on Information, Computer and Communications Security

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Software-based root-of-trust has been proposed to overcome the disadvantage of hardware-based root-of-trust, which is the high cost in deployment and upgrade (when vulnerabilities are discovered). However, prior research on software-based root-of-trust only focuses on uniprocessor platforms. The essential security properties of such software-based root-of-trust, as analyzed and demonstrated in our paper, can be violated on multicore platforms. Since multicore processors are becoming increasingly popular, it is imperative to explore the feasibility of software-based root-of-trust on them.In this paper, we analyze the challenges of designing softwarebased root-of-trust on multicore platforms and present two practical attacks that utilize the parallel computing capability to break the existing schemes. We then propose a timing-based primitive, called MT-SRoT, as the first step towards software-based root-oftrust on multicore platforms. MT-SRoT is able to ensure untampered execution of a critical security task, such as remote software attestation, on homogeneous shared-memory multicore platforms without the support of tamper-resistant hardware. We implement MT-SRoT and show its effectiveness on both Intel dual-core and quad-core processors.

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Section: Pipeline Parallelism Attackmentioning

confidence: 99%

A software-based root-of-trust primitive on multicore platforms

Yan

Han

et al. 2011

Proceedings of the 6th ACM Symposium on Information, Computer and Communications Security

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“…Several studies [9,6,2] have discussed the importance of using pipelined parallelism on CMP platforms. FDP provides automatic runtime tuning of core-to-stage allocation for this important paradigm and obtains improved performance and power-efficiency.…”

Section: Related Workmentioning

confidence: 99%

Feedback-directed pipeline parallelism

Suleman

Qureshi

Khubaib

et al. 2010

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques

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Extracting high performance from Chip Multiprocessors requires that the application be parallelized. A common software technique to parallelize loops is pipeline parallelism in which the programmer/compiler splits each loop iteration into stages and each stage runs on a certain number of cores. It is important to choose the number of cores for each stage carefully because the core-to-stage allocation determines performance and power consumption. Finding the best core-to-stage allocation for an application is challenging because the number of possible allocations is large, and the best allocation depends on the input set and machine configuration.This paper proposes Feedback-Directed Pipelining (FDP), a software framework that chooses the core-to-stage allocation at run-time. FDP first maximizes the performance of the workload and then saves power by reducing the number of active cores, without impacting performance. Our evaluation on a real SMP system with two Core2Quad processors (8 cores) shows that FDP provides an average speedup of 4.2x which is significantly higher than the 2.3x speedup obtained with a practical profile-based allocation. We also show that FDP is robust to changes in machine configuration and input set.

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