Fabrication of Transfer-Enhanced Semiconductor Substrates by Wafer Bonding and Hydrogen Exfoliation Techniques

Joshi, Monali; Hayashi, S.; Goorsky, Mark S.

doi:10.1149/1.2940345

Cited by 16 publications

(17 citation statements)

References 17 publications

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“…PSi for LTP applications should have a minimum of stress and structural disorder. In this way the mechanical strength of the membrane is increased and they can sustain further processing [27,28]. We fabricate several DPLs on a silicon substrate with the above-mentioned solutions.…”

Section: Surface Characterization and Crystallinity Of The Dplmentioning

confidence: 99%

Self detachment of free-standing porous silicon membranes in moderately doped n-type silicon

Kumar

Gennaro²,

Sasikumar

et al. 2013

Appl. Phys. A

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In this article we describe a reliable etching method to fabricate porous silicon free-standing membranes (FSMs) based on a self detachment of the porous layer in moderately doped n-type silicon substrates. We found that stable growth of smooth and straight pores is restricted to a narrow range of etching conditions and, unlike p-type substrates, the lift-off of the membrane is a self-limited process that does not require a large burst of current. The detachment of the porous membrane is independent of the structure of the already porosified layer, meaning that the average pore diameter can be tuned from nano to macro size within the same membrane. We also demonstrate that, despite their limited thickness, FSMs are quite robust and can sustained further processing. Thus, the etching receipt we are proposing here extends the range of sensors and filters that can be fabricated using porous silicon technology.

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Section: Surface Characterization and Crystallinity Of The Dplmentioning

confidence: 99%

Self detachment of free-standing porous silicon membranes in moderately doped n-type silicon

Kumar

Gennaro²,

Sasikumar

et al. 2013

Appl. Phys. A

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“…By using H implantation, Jalaguier et al (164) and Tong et al (165) were the first to demonstrate the transfer of three-inch GaAs and InP thin layers onto oxidized Si substrates. Following these pioneering works, research groups at SOITEC/LETI, UCLA, UCSD, Caltech, and MPI-Halle have reported the splitting of InP and GaAs thin layers with a diameter up to four inches by using H and/or He implantation (68,(164)(165)(166)(167)(168)(169)(170)(171). The typical optimal implantation fluences range from 5 × 10 16 to 1 × 10 17 atom cm −2 for ion energies in the 50-150-keV range.…”

Section: Ion Cutting Of Inp and Gaasmentioning

confidence: 99%

Heterogeneous Integration of Compound Semiconductors

Moutanabbir

Gösele

2010

Annu. Rev. Mater. Res.

139

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The ability to tailor compound semiconductors and to integrate them onto foreign substrates can lead to superior or novel functionalities with a potential impact on various areas in electronics, optoelectronics, spintronics, biosensing, and photovoltaics. This review provides a brief description of different approaches to achieve this heterogeneous integration, with an emphasis on the ion-cut process, also known commercially as the Smart-Cut TM process. This process combines semiconductor wafer bonding and undercutting using defect engineering by light ion implantation. Bulk-quality heterostructures frequently unattainable by direct epitaxial growth can be produced, provided that a list of technical criteria is fulfilled, thus offering an additional degree of freedom in the design and fabrication of heterogeneous and flexible devices. Ion cutting is a generic process that can be employed to split and transfer fine monocrystalline layers from various crystals. Materials and engineering issues as well as our current understanding of the underlying physics involved in its application to cleaving thin layers from freestanding GaN, InP, and GaAs wafers are presented.

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“…By using H implantation, Jalaguier et al (39) and Tong et al (40) were the first to demonstrate the transfer of three-inch GaAs and InP thin layers onto oxidized Si substrates. Following these pioneering works, research groups at SOITEC/LETI, UCLA, UCSD, Caltech, and MPI-Halle have reported the splitting of InP and GaAs thin layers with a diameter up to four inches by using H and/or He implantation (19,(39)(40)(41)(42)(43)(44)(45)(46). Figures 3-6 show examples of successful application of the ion-cut process to transfer semiconductor thin layers onto Si wafers.…”

Section: Ultrathin Layer Splitting By Ion-cut Processmentioning

confidence: 99%

Heterointegration of Compound Semiconductors by Ultrathin Layer Splitting

Moutanabbir¹

2010

ECS Trans.

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Compound semiconductors are very attractive for a wide spectrum of applications in electronics, optoelectronics, photonics, and photovoltaics. From materials standpoint, the exploitation of the full potential of these technologies requires processes that can satisfy the two major conditions: (1) Integrability with the traditional technology of Si; and (2) Cost-effective. In this perspective, this paper presents the ion-cut process by which fine monocrystalline layers can be transferred onto foreign substrates. Bulk quality heterostructures frequently unattainable by direct epitaxial growth can be produced, which offers an additional degree of freedom in design and fabrication of hybrid devices. Ioncut process can also be exploited to reduce the material cost by splitting several ultrathin layers from the same wafer. Materials and engineering issues as well as our current understanding of the underlying physics involved in the application of ion-cut process to cleave thin layers from III-V and III-nitride semiconductors are briefly discussed.

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Fabrication of Transfer-Enhanced Semiconductor Substrates by Wafer Bonding and Hydrogen Exfoliation Techniques

Cited by 16 publications

References 17 publications

Self detachment of free-standing porous silicon membranes in moderately doped n-type silicon

Self detachment of free-standing porous silicon membranes in moderately doped n-type silicon

Heterogeneous Integration of Compound Semiconductors

Heterointegration of Compound Semiconductors by Ultrathin Layer Splitting

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