Fabrication of the pyramidal microstructure on silicon substrate using KOH solution

Abstract

Abstract. The texturization of monocrystalline silicon wafers using a mixture of potassium hydroxide and isopropyl alcohol solutions has been investigated. The texture morphology and pyramid size are affected by the KOH concentration, the temperature and the time together. The surface reflectance and the surface morphology were measured with a UV-Visible Spectrophotometer and a scanning electronic microscope (SEM) respectively. We reported a relatively uniform size, dense arrangement pyramid microstructure on the basement of silicon texture. According to the reflectance and SEM patterns, we got the appropriate concentration of KOH, 20wt% and 25wt%, with the corresponding reflectance were 12.049% and 14.593%. It means that either too low temperature with a long time or too high temperature with a short can damage the formation. We got the surface morphology, which was consisted of 1-1.5 µm sized pyramids. From the pyramid dimension, the optimum process condition was found to be 20wt% KOH, 3wt% IPA, 60˚C and 5 min at which was reduced to 1.292µm. From the SEM images density and uniformity, the optimized condition is 20wt% KOH, 3wt% IPA, 70˚C and 15mins though its size has reached the 1.404µm.

Structural and Optical Properties of Textured Silicon Substrates by Three-Step Chemical Etching

“…Both the top-view and the side-view SEM images of samples treated by anisotropic wet etching for 30, 40, 50, and 60 min are shown in Figure a–d, respectively. Since the etching rate of the (111) crystallographic plane is slower than that of the (100) crystallographic plane, − the anisotropic etching would lead to the formation of a pyramidal structure exposing the crystal planes of {111} on the (100) flat silicon. When the etching time was 30 min and less, the formation of the pyramid structure was premature, and Figure a shows the blunt tips and edges of the pyramids.…”

Increased Interfacial Area between Dielectric Layer and Electrode of Triboelectric Nanogenerator toward Robustness and Boosted Energy Output

“…The fabrication procedure of the stamp begins with anisotropic chemical etching of a silicon wafer (P-type (100) test grade, 4science, Gyeonggi-do, Korea) into micropyramid structures. The mixture of KOH/DI water/IPA (20/77/3 wt %) is used as the etching solution, and the etching temperature and time are 70 °C and 15 min, respectively [31]. Thereafter, the surface structures of the etched wafer are replicated by a polydimethylsiloxane (PDMS, Dow Corning, Midland, MI, USA) replica molding process.…”