Fabrication of Mo-gate/Ti—silicide-clad-moat MOS Devices by use of multilayer-glass depositions

Abstract

Abshakt-A novel technique is described which uses undoped and doped glass depositions at the gate level to make a molybdenum-metal-gate process compatible with a direct-react titanium-silicide clad-moat process. The method is applicable to submeter micro design-rule MQS IC devices and yields 0.3 Q / O and 2.0 Q / c I for gate and moat levels, respectively. I. INTRODUCTIONEQUIREMEWTS for future MOS VLSI devices include low-resistance replacements for the doped-polysilicon or silicide-clad-polysilicon gate material and for the diffused source/drain areas. Sheet resistances on the order of 0.3 CliU for the gate and 3 CliU for sourceidrain regions are needed for speed improvement and for design flexibility for a broad range of VLSI memory and logic devices.A simultaneous direct-react silicide-cladding of moat and gate levels has been described[l] which can be used to provide sheet resistances for both levels of about 1. CliC [2]and such a process is expected to be applicable to many devices. It is the purpose here, however, to describe a new process which further reduces the gate sheet-resistance, a critical parameter for access times, by a factor of four, by the use of a refractory metal gate rather than a titanium-silicideipolysilicon sandwich structure. The essential feature of this new process is that it provides compatibility between the use of a refractory metal gate and a direct react cladding of the moat level by employing a multilayer-glass-encapsulation of the metal gate.