Fabrication of a 34 × 34 Crossbar Structure at 50 nm Half-pitch by UV-based Nanoimprint Lithography

Abstract

We have developed a single-layer UV-nanoimprint process, which was utilized to fabricate 34 × 34 crossbar circuits with a half-pitch of 50 nm (equivalent to a bit density of 10 Gbit/cm 2 ). This process contains two innovative ideas to overcome challenges in the nanoimprint at shrinking dimensions. First, our new liquid resist formulation allowed us to minimize the residual resist layer thickness after curing and requires the relatively low imprint pressure of 20 psi. Second, by engineering the surface energy of the substrate we also eliminated the problem of trapped air during contact with the mold such that it spreads the resist and expels trapped air uniformly. Our overall process required fewer processing steps than any bilayer process and yielded high quality results at 50 nm half-pitch.

The mechanism of electroforming of metal oxide memristive switches

“…After a negative voltage sweep (green curve in figure 1(a) figure 1(a), inset). Figure 1(d) presents atomic force microscopy (AFM) images for nano-devices with a 50 nm thick TiO 2 insulator sandwiched between 50 nm wide Pt nanowire electrodes, as fabricated by nanoimprint lithography (NIL) [32,33]. The TiO 2 is a sputter-deposited amorphous or nanocrystalline thin film (see supplemental information figure S1 (available at stacks.iop.org/Nano/20/215201) for x-ray diffraction and transmission electron microscopy data; see [2] for additional related materials properties).…”

Advancements in organic nonvolatile memory devices

“…In 2003, Hewlett-Packard Labs, in collaboration with UCLA, fabricated a crossbar memory circuit of 64 bits (8×8) at a density of 5.9 Gbit/cm 2 using nanoimprint lithography [16,17]. In 2004, Hewlett-Packard Labs fabricated a 1 Kbit (34×34) crossbar circuit (with line width 35 nm and halfpitch 50 nm) at a density of 10 Gbit/cm 2 [18], as shown in Figure 1. Then in 2005, Hewlett-Packard Labs reported the fabrication of a 1 Kbit crossbar molecular memory at a density of 28 Gbit/cm 2 (30-nm half-pitch) [19].…”

The impact of the nanoscale on computing systems

“…To date, the most com-plex MSE systems created are crossbars [34]- [36]. Clearly, post-fabrication customization is required to implement custom circuits.…”