Fabrication and characterization of a self-aligned gate stack for electronics applications

Abstract

A metal–oxide–semiconductor (MOS) gate stack that is self-aligned with the underlying silicon doping profile is demonstrated. We combine a new hybrid bottom-up patterning technique with atomic layer deposition (ALD) to selectively deposit a platinum-hafnium dioxide-silicon MOS gate stack. A poly(methyl methacrylate) (PMMA) brush is blanket grown from a Si(100) surface and selectively removed from the lightly doped (∼1018 cm−3) regions using a doping-selective KOH etch. The PMMA brush that remains on the heavily doped (∼1020 cm−3) regions effectively blocks the ALD of both HfO2 and platinum. MOS capacitors exhibit promising capacitance-voltage characteristics with a HfO2 dielectric constant of ∼25 and an average interface state density of 2.1 × 1011 eV−1 cm−2 following forming gas anneal.

Mechanisms for undesired nucleation on H-terminated Si and dimethylamino-trimethylsilane passivated SiO2 during TiO2 area-selective atomic layer deposition

“…This demonstrates that mechanisms associated with unwanted nucleation during ASD can depend on details of the surface passivation scheme, thereby providing insights to help improve ASD strategies for advanced applications.Low temperature area-selective deposition (ASD) is a promising bottom-up technique to promote nanopatterning for next-generation, sub-10 nm semiconductor manufacturing while complementing or reducing requirements for expensive lithography steps. [1][2][3] In an ASD process, chemical differences on a patterned substrate are exploited to deposit material on a desired "growth" region, with an adjacent, "nongrowth" region selected or designed to inhibit growth. 4,5 For example, during TiO2 atomic layer deposition (ALD) using TiCl4 and H2O at ~170 °C, film growth proceeds linearly from the first cycle on hydroxylated SiO2, while under the same ALD conditions, TiO2 nucleation is inherently inhibited on H-terminated silicon (Si-H) surfaces.…”

“…Woollam alpha-SE). The RBS results are converted to an equivalent film thickness using a TiO2 film density of 3.72 g/cm 3 . Figure 1a and b show SEM images of the Si-H and SiO2-TMS surfaces, respectively, after various numbers of ALD cycles.…”

Quantified Uniformity and Selectivity of TiO2 Films in 45‐nm Half Pitch Patterns Using Area‐Selective Deposition Supercycles

“…Area-selective deposition (ASD) techniques have recently grown significant research interest to enable sub-10 nm resolution in semiconductor manufacturing. [1][2][3] ASD relies on chemical differences on different regions of a substrate to deposit material at a different rate in each region, thus resulting in bottom-up nanopattern growth. [1,4] Deposition on the desired "growth" region occurs more quickly than on the desired "nongrowth" region and is typically achieved using techniques such as chemical vapor deposition or atomic or molecular layer deposition (ALD/MLD).…”