Tailoring interfaces with polymer brushes is a commonly used strategy to create functional materials for numerous applications. Existing methods are limited in brush thickness, the ability to generate high-density brushes of biopolymers, and the potential for regeneration. Here we introduce a scheme to synthesize ultra-thick regenerating hyaluronan polymer brushes using hyaluronan synthase. The platform provides a dynamic interface with tunable brush heights that extend up to 20 microns – two orders of magnitude thicker than standard brushes. The brushes are easily sculpted into micropatterned landscapes by photo-deactivation of the enzyme. Further, they provide a continuous source of megadalton hyaluronan or they can be covalently-stabilized to the surface. Stabilized brushes exhibit superb resistance to biofilms, yet are locally digested by fibroblasts. This brush technology provides opportunities in a range of arenas including regenerating tailorable biointerfaces for implants, wound healing or lubrication as well as fundamental studies of the glycocalyx and polymer physics.

Doped semiconductor nanostructures are interesting for the fabrication of nanoscale electronic and photonic devices. Here, we use scattering-type scanning near-field optical microscopy (s-SNOM) to characterize axial carrier density gradients in phosphorus-doped silicon nanowires. We quantitatively determine the carrier density and length of the doped segment as well as the functional form of the charge carrier gradient in the transition region between doped and nominally undoped segments. These measurements are enabled by understanding and accounting for the influence of the native oxide on the near-field optical contrasts in the transition region. Our results are supported by correlative energy dispersive X-ray spectroscopy (EDS) measurements. This work demonstrates the ability of s-SNOM to directly probe nanoscale charge carrier density transitions through thin surface layers, a capability that is important for a variety of doped semiconductor systems.

Although heat pump clothes dryers offer the potential to save a significant amount of energy as compared to conventional vented electric dryers; they are prone to air leakage that can limit their efficiency gain. This study serves to develop a novel method of quantifying leakage, and to determine specific leakage locations in the dryer drum and air circulation system. The method follows an American Society of Testing and Materials (ASTM) standard, which is used to determine air leakage area in a household ventilation system through fan pressurization. This ASTM method is adapted to the dryer system, and the leakage area is determined by an analysis of the leakage volumetric flow-pressure relationship. The procedure presents a framework that determines and quantifies major components contributing to leakage in HPCDs. The novel method can improve component design features, resulting in more efficient HPCD systems.

The fully bottom-up and scalable synthesis of complex micro/ nanoscale materials and functional devices requires masking methods to define key features and direct the deposition of various coatings and films.Here, we demonstrate selective coaxial lithography via etching of surfaces (SCALES), an enabling bottom-up process to add polymer masks to micro/ nanoscale objects. SCALES is a three-step process, including (1) bottom-up synthesis of compositionally modulated structures, (2) surface-initiated polymerization of a conformal mask, and (3) selective removal of the mask only from regions whose underlying surface is susceptible to an etchant. We demonstrate the key features of and characterize the SCALES process with a series of model Si/Ge systems: Si and Ge wafers, Si and Ge nanowires, and Si/Ge heterostructure nanowires.

Efficient characterization of semiconductor nanowires having complex dopant profiles or heterostructures is critical to fully understand these materials and the devices built from them. Existing electrical characterization techniques are slow and laborious, particularly for multisegment nanowires, and impede the statistical understanding of highly variable samples. Here, it is shown that electro‐orientation spectroscopy (EOS)—a high‐throughput, noncontact method for statistically characterizing the electrical properties of entire nanowire ensembles—can determine the conductivity and dimensions of two distinct segments in individual Si nanowires with axially encoded dopant profiles. This analysis combines experimental measurements and computational simulations to determine the electrical conductivity of the nominally undoped segment of two‐segment Si nanowires, as well as the ratio of the segment lengths. The efficacy of this approach is demonstrated by comparing results generated by EOS with conventional four‐point‐probe measurements. This work provides new insights into the control and variability of semiconductor nanowires for electronic applications and is a critical first step toward the high‐throughput interrogation of complete nanowire‐based devices.

We introduce and demonstrate critical steps toward the Geode process for the bottom-up synthesis of semiconductor nanowires. Central to the process is the design and fabrication of an unconventional, high surface area substrate: the interior surface of hollow silica microcapsules, assembled from silica particles via emulsion templating, and featuring porous walls to enable efficient gas transport. The interior surface of these hollow silica microcapsules is decorated with gold nanoparticles that seed nanowire growth via the vapor–liquid–solid (VLS) mechanism. We demonstrate the production of the necessary microcapsules and show how microcapsule structure and stability upon drying are influenced by the type of silica particles and use of a particle cross-linking agent. Finally, we demonstrate the synthesis of crystalline Si nanowires in the microcapsule interior.

A metal–oxide–semiconductor (MOS) gate stack that is self-aligned with the underlying silicon doping profile is demonstrated. We combine a new hybrid bottom-up patterning technique with atomic layer deposition (ALD) to selectively deposit a platinum-hafnium dioxide-silicon MOS gate stack. A poly(methyl methacrylate) (PMMA) brush is blanket grown from a Si(100) surface and selectively removed from the lightly doped (∼1018 cm−3) regions using a doping-selective KOH etch. The PMMA brush that remains on the heavily doped (∼1020 cm−3) regions effectively blocks the ALD of both HfO2 and platinum. MOS capacitors exhibit promising capacitance-voltage characteristics with a HfO2 dielectric constant of ∼25 and an average interface state density of 2.1 × 1011 eV−1 cm−2 following forming gas anneal.

Ensembles of semiconductor nanowires grown via the bottom-up vapor−liquid−solid (VLS) mechanism, especially those that are lightly doped or nominally undoped, can exhibit large nanowire-to-nanowire variations in electrical conductivity. This broad conductivity distribution, attributed to uncontrolled surfaces and the large surface area of nanowires, limits the fabrication of homogeneous ensembles of nanoelectronic devices, including transistors, photovoltaics, and biosensors. While methods to control surfaces are well understood for planar surfaces, the diversity of surface structures in a nanowire ensemble introduces new processing and characterization challenges. Here, we employ electro-orientation spectroscopy, a high-throughput, solutionbased method, to measure the conductivity distributions and quantify the variability of as-synthesized and postprocessed Si nanowire ensembles. Our measurements reveal a conductivity distribution with an unusual, highly skewed non-Gaussian shape, whose variability is best quantified with a log-normal coefficient of variation (COV). We demonstrate a reduction in the COV up to 2.6× as a function of increasing conformal Al 2 O 3 thickness. The decreased COV and accompanying increase in mean conductivity are consistent with a narrower distribution of surface-state densities upon passivation. Our findings highlight the surface-dependent variations inherent to bottom-up nanowire processing, and the need for advanced processes and analytical tools to control these variations for nanoelectronic applications.