Extrinsic base optimization for high-performance RF SiGe heterojunction bipolar transistors

Abstract

A comprehensive study on the effect of extrinsic base optimization on the RF performance of an advanced SiGe HBT is presented. An optimized extrinsic poly base with its interface to the epi-base passivated by boron ions is demonstrated to enhance the f max and the current gain almost two times and to reduce the low-frequency 1/f noise ten times and noise figure (NF) 0.5 dB, achieving f max of 45 GHz, 1/f noise corner frequency of 700 Hz at I B = 1:0 A, NF 1:0 dB at 900 MHz. Early voltage V A of 200 V is achieved, while maintaining a BV CEO of 8.0 V.

Impact on Low-Frequency Noise Properties from Lateral Design of Differentially Grown SiGe HBTs

“…This indicates that the lateral diffusion of the implanted boron is insufficient to passivate the defects at the cross-over in accordance with Ref. [1]. Figure 4 shows 6 I B vs. frequency corresponding to devices in Fig.…”

“…The interface between the polycrystalline and epitaxial Si/SiGe stack …………… is clearly observed as well as a defect-rich region in the epitaxial base arising from the extrinsic base implantation. The resulting polcrystalline/epitaxial cross-over has been shown to be a dominant low-frequency noise source in SiGe HBTs due to the large number of traps present [1]. Boron implantation used for the extrinsic base formation was found to improve the lowfrequency noise performance.…”

“…Boron implantation used for the extrinsic base formation was found to improve the lowfrequency noise performance. Boron atoms are suggested to passivate traps at the crossover [1]. In Ref.…”

“…In Ref. [1], one lateral design parameter was used for studying low-frequency noise performance. In this work, we have varied WZR essential lateral design parameters for the SiGe HBT.…”

SiGe technologies for wireless microwave and millimeter-wave applications

“…Others works have shown that some additional noise can be fouiid in the emitter resistance [28]. Others authors have foiind that some noise could be generated in the extrinsic base region rciated with some front edge implantation damage [29] as well as some surface problcms assticiatcd with the cleaning inethod used to realize the CMOS devices [25]. We propusc in figure 9 a noise modcl, which leads EO a very good accuracy of the noise behavior and which involve noise at the emitter -base junction, noisc ai the collector terminal, noisc in tile cmiiter resismicc and some noise located at the extrinsic base region.…”