Extraction of sheet resistance from four-terminal sheet resistors replicated in monocrystalline films with nonplanar geometries

Abstract

This paper describes limitations of conventional methods of extracting sheet resistance from four-terminal sheet resistors incorporated into electrical linewidth test structures that are patterned in (110) monocrystalline silicon-on-insulator (SOI) films. Nonplanar sections of these structures render the extraction of sheet resistance by conventional techniques subject to systematic errors. The errors are addressed here by algorithms incorporating the results of finite-element currentflow analysis. The intended end application is to facilitate the use of the uniquely high repeatability and low cost of electrical critical dimension (CD) metrology as a secondary reference in a traceability path for CD-reference artifacts.

Axial resistivity measurement of a nanopillar ensemble using a cross-bridge Kelvin architecture

“…Figure 3(a) shows the change in surface void fraction as a function of cap thickness, determined from plan view SEM images using ImageJ, with areal void fractions below 1% achieved. Nonlinear behavior has been reported with increasing test current, 39 but we did not observe such effects within our test window. Figures 2(d) and 2(f) illustrate the effects of "optimized" etching, disrupting lateral conductivity in nondevice areas [ Fig.…”