Abstract:For recent manufacturable CMOS technologies to extend the Moore's law, the interest in the strain engineering has been speed-up in recent years as a need in further scaling of CMOS devices for high speed and low power applications. Among those reported strain schemes [1-10], process-induced stress technique [1,6,10], strained-SiGe channel devices [3,8], substrate engineering, and hybrid substrate technology [9] have been attractive for high speed and low power logic CMOS technologies. As a consequence, strain-… Show more
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