Extending an FET layout verification system to bipolar technology

Gannett, J.W.

doi:10.1109/bipol.1988.51074

Cited by 4 publications

(4 citation statements)

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“…Shortfnder is part of the Rink layout analysis system [ 5 ] . Rink is a general purpose layout analysis system providing netlist extraction [ 6 ] , netlist comparison [7], and graphical display programs in an integrated system.…”

Section: Overview Of Shortfindermentioning

confidence: 99%

“…Such flexibility is vital in an environment where a wide range of design methods and technologies are used. Rink has been used to analyze chips ranging from Gallium Arsenide laser drivers to bipolar lightwave amplifiers to CMOS VLSI signal processors [ 5 ] , [9], [IO]. The shorrfrnder utility is a recent enhancement to the Rink system that solves the difficult problem of locating shorts between complex nets.…”

Section: Overview Of Shortfindermentioning

confidence: 99%

“…5(b)). Although the preceding example was a CMOS cell, shortJnder can be (and has been) adapted to bipolar, GaAs, and any other technology handled by the Rink system [5]. The only technology dependent data needed by shorrjinder is an identification of the contact via masks, since this information is needed for determining local electrical connectivity.…”

Section: Vssmentioning

confidence: 99%

“…The graphics interface for shortfinder runs on a Sun workstation under Sun's window system. It was obtained by adding about 800 lines of C code to Rink's existing layout viewing program [5]. An X windows version, which can run on a variety of workstations, is being prepared.…”

Section: Implementation and Performancementioning

confidence: 99%

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SHORTFINDER: a graphical CAD tool for locating net-to-net shorts in VLSI chip layouts

Gannett¹

1990

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Despite advances in CAD tools, layout errors resulting in electrical shorts between complex nets continue to cause trouble in many VLSI design projects. Locating the geometrical features causing shorts is often the most vexing problem faced during the layout verification process. Although this problem is common and important, there seems to be no published literature dealing with short location. This paper describes a new interactive CAD tool, called shortfinder, that enables the user to find such errors quickly and with minimal effort. This is accomplished by displaying a cycle-free shortest electrical path between two points indicated by the user on a graphical display of the layout. Shorrfinder was implemented as a modular enhancement to an existing layout viewing program: its data structures and algorithms are described in this paper.

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Section: Overview Of Shortfindermentioning

confidence: 99%

Section: Overview Of Shortfindermentioning

confidence: 99%

Section: Vssmentioning

confidence: 99%

Section: Implementation and Performancementioning

confidence: 99%

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