Exploiting scalable CGRA mapping of LU for energy efficiency using the Layers architecture

Rakossy, Zoltan Endre; Stengele, Dominik; Ascheid, Gerd; Leupers, Rainer; Chattopadhyay, Anupam

doi:10.1109/vlsi-soc.2015.7314440

Cited by 5 publications

(14 citation statements)

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“…Focus is kept on efficiency and scalability during the case studies, covering a wide range of possible requirements, highlighting the flexibility of this approach. The chapter is based on my work from several publications [135][136][137][138][139][140] 1 , treating different aspects of this exploration.…”

Section: Chaptermentioning

confidence: 99%

“…The input to the LU-factorization is a square matrix A ∈ ℜ n×n with |A| = 0. The output for our implementation 3 consists of two matrices, L ∈ ℜ n×n and U ∈ ℜ n×n , such that values above and below the diagonal are zero, respectively [140]:…”

Section: Algorithmmentioning

confidence: 99%

“…For more efficient memory usage, the matrices L 3 and U 3 are combined to matrix Q 3 , superposing the matrices such that [140]:…”

Section: Mappingmentioning

confidence: 99%

“…u 2n , where the multiplications and subtractions are parallel. This gives a flexible execution window of size N 2 × 1, sliding to the right on the row until the end, where possible size mismatches are truncated by predication in the Q-layer [140]:…”

Section: Mappingmentioning

confidence: 99%

“…In the above example, only the last row remains, after which the final form of Q 3 is reached. [140] In general, while the the first row of Q, i.e. u 11 , .…”

Section: Mappingmentioning

confidence: 99%

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Modeling, analysis and exploration of layers: A 3D computing architecture

Rakossy

2014

2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC)

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Current trends in architectural design require high-performance, low-power, flexible architectures that can adapt quickly onto the ever shifting and evolving application landscape. Finding the best architecture matching these stringent constraints is further limited by a short time-to-market window, which severely limits design exploration options. This work tackles these problems by proposing a different view on architectural flexibility, which can be exploited to achieve high energy-efficiency and performance instead of being traded off, by exploiting the advantages of reconfigurable architectures. Starting from a theoretical view, a methodology is produced for exploration of two different approaches in achieving high energy efficiency with two different architectural concepts: an architecture perfectly tuned to the application; and a new reconfigurable layered architecture, which can adapt its structure to match the application.

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Section: Chaptermentioning

confidence: 99%

Section: Algorithmmentioning

confidence: 99%

“…For more efficient memory usage, the matrices L 3 and U 3 are combined to matrix Q 3 , superposing the matrices such that [140]:…”

Section: Mappingmentioning

confidence: 99%

Section: Mappingmentioning

confidence: 99%

“…In the above example, only the last row remains, after which the final form of Q 3 is reached. [140] In general, while the the first row of Q, i.e. u 11 , .…”

Section: Mappingmentioning

confidence: 99%

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