2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2017
DOI: 10.1109/fccm.2017.59
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Efficient GPGPU Computing with Cross-Core Resource Sharing and Core Reconfiguration

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“…Other works [8][9][10] targeted data-path units, such as the register file, and some internal components of the execution units (EUs) [11]. Similarly, some works proposed reconfiguration solutions targeting computational blocks in GPGPUs [12] or other modules in the GPGPU, such as the memories [13], and functional units [14], or combinations of both aligning the system to the specific workload requirements [2,15]. In [16], the author proposes selective hardware redundancy to correct defective blocks during the production stage.…”
Section: Introductionmentioning
confidence: 99%
“…Other works [8][9][10] targeted data-path units, such as the register file, and some internal components of the execution units (EUs) [11]. Similarly, some works proposed reconfiguration solutions targeting computational blocks in GPGPUs [12] or other modules in the GPGPU, such as the memories [13], and functional units [14], or combinations of both aligning the system to the specific workload requirements [2,15]. In [16], the author proposes selective hardware redundancy to correct defective blocks during the production stage.…”
Section: Introductionmentioning
confidence: 99%